FIXED 256Mb Jasper Glitches Fine, Not Booting into Xell.

[Nadles]

TX Product(s) used: Nand-X, Jr-Programmer, R-Jtag Starter Kit. (Post Qsb, Etc.)
Console Type: Jasper
NAND size: 256Mb
Dashboard version: e.g 2.0.16202
CB version: e.g 6574
Screenshot of NAND details from J-Runner: Can't Screen Shot with a MacBook With Bootcamp.
J-Runner log:In Code Below.
Image of Coolrunner:
Images of close-up soldering to motherboard:
(attach images to your post)
Of course.

Description of problem: Console Boots Fine, Just will not enter Xell.

Was the console working before you started: Yup.

Console Enjoy's Booting. Will not show Xell by any means. I had it come up once somehow but gave me an incorrect Cpu Key. I've tried Aud Clamp and Standard and did re-write Xell for it I can not find it in my log however it wouldn't even boot. I have included all pictures. I have only tried the CPU RST point on the bottom of the board and I have gotten E74 error when it attempts over 6 times normally. Touched up all points and it always boots in three according to Rater.

But Xell never wants to come up.

Installed with Aud_Clamp & Standard. Dips 3,7,8 Aud. 5,7,8 Standard. Wire Install for JR-Programmer.

Version: 03Flash Config: 0x008A3020
CB Version: 6754
Jasper 256MB Manually Selected
Reading Nand to C:\Users\Nathan Dadles\Desktop\Consoles\360\Programs\J-Runner v02 Beta (288) Core Pack\output\nanddump1.bin
Reading Nand
Error: 250 reading block CC0
Error: 210 reading block CC1
Error: 210 reading block CC2
Error: 210 reading block CC3
Error: 210 reading block CC4
Error: 210 reading block CC5
Error: 210 reading block CC6
Error: 210 reading block CC7
Done!
in 8:07 min:sec


Reading Nand to C:\Users\Nathan Dadles\Desktop\Consoles\360\Programs\J-Runner v02 Beta (288) Core Pack\output\nanddump2.bin
Initializing nanddump1.bin..
Jasper BB
Nand Initialization Finished
Reading Nand
Error: 250 reading block CC0
Error: 210 reading block CC1
Error: 210 reading block CC2
Error: 210 reading block CC3
Error: 210 reading block CC4
Error: 210 reading block CC5
Error: 210 reading block CC6
Error: 210 reading block CC7
Done!
in 8:08 min:sec


Comparing...Takes a while on big nands
Bad Block ID  0198 Found @ 0x01FF [Offset: 0x41DF000]
Block ID 01FF [Offset: 0x41DF000] remapped to Block ID 0198 [Offset: 0x3498000]
Bad Blocks Remapped
Bad Block ID  0198 Found @ 0x01FF [Offset: 0x41DF000]
Block ID 01FF [Offset: 0x41DF000] remapped to Block ID 0198 [Offset: 0x3498000]
Bad Blocks Remapped
0x00F2
0x08D3


Initializing nanddump1.bin..
Jasper BB
Nand Initialization Finished
Comparing...Takes a while on big nands
Bad Block ID  0198 Found @ 0x01FF [Offset: 0x41DF000]
Block ID 01FF [Offset: 0x41DF000] remapped to Block ID 0198 [Offset: 0x3498000]
Bad Blocks Remapped
Bad Block ID  0198 Found @ 0x01FF [Offset: 0x41DF000]
Block ID 01FF [Offset: 0x41DF000] remapped to Block ID 0198 [Offset: 0x3498000]
Bad Blocks Remapped
Nands are the same


Monday, September 02, 2013 10:35:09 AM


J-Runner v0.3 Beta (1) Started




WARNING! - Your selected working directory already contains files!
You can view these files by using 'Show Working Folder' Button




Checking Files
Finished Checking Files
Initializing nanddump1.bin..
Jasper 256MB
Jtag Selected
Nand Initialization Finished
R-Jtag Selected
Aud_Clamp Selected
Patching Jasper version 2.3 SMC at offset 0x12BA
XeLL file created Successfully jasper_hack_bigblock_aud_clamp.bin
Initializing jasper_hack_bigblock_aud_clamp.bin..
Too Many Bad Blocks
Header is wrong..
Too Many Bad Blocks
Jasper BB
Too Many Bad Blocks
Nand Initialization Finished
Version: 03
Flash Config: 0x008A3020
Writing Nand
jasper_hack_bigblock_aud_clamp.bin
Done!
in 0:09 min:sec

Rater

Phat Selected
Version: 10
Power Up
Waiting for POST to change
Post 86 - Panic - EXTERNAL 
Post 06 
Post 26 - FETCH_HEADER_3BL_CC 
Post 06 
Post 26 - FETCH_HEADER_3BL_CC 
Post 06 
Post 26 - FETCH_HEADER_3BL_CC 
Post 06 
Post E0 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Shutdown
Power Up
Waiting for POST to change
Post 86 - Panic - EXTERNAL 
Post A6 - Panic - LOCATE_3BL_CC 
Post 86 - Panic - EXTERNAL 
Post 4D - DECODE_FUSES 
Post F8 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 39 - SHA_VERIFY_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Shutdown

Just a quick 2 boots to show you guys what is going on. Nothing is attached. It is in the cage.






Please excuse me if this is an easy fix. I've been going at it all last night and today. This is my first R-Jtag period let alone on a BB Jasper. I've read the guides through and through. I don't have any Bad Blocks in the First 50 and can not really understand why it just won't show Xell. I do not have another way to get the CPU Key and normally with RGH on these Phat's, When it boots into Xell the Center Light on the RF Module stops blinking. Which mine doesn't. I have tried A/V Cables and HDMI. I can not get it to boot into Xell. But she loves to Glitch.

 

[gavin_darkglide]

start by putting 3 way switch on Jtag board to the center posistion also go over the points on the header for jtag alt v2 board again.

 

[Nadles]

start by putting 3 way switch on Jtag board to the center posistion.

Was there. Must have moved back to 330 while in my lap. Will test again. Also TDI/TMS are correct values to Ground forgot to mention.

Waiting for POST to change
Post EF 
Post ED 
Post 6D - INIT_KEY_EX_VAULT 
Post 65 - INIT_STACKS 
Post 61 - INIT_HAL_PHASE_0 
Post 41 - VERIFY_OFFSET 
Post 86 - Panic - EXTERNAL 
Post A6 - Panic - LOCATE_3BL_CC 
Post 86 - Panic - EXTERNAL 
Post A6 - Panic - LOCATE_3BL_CC 
Post 86 - Panic - EXTERNAL 
Post A6 - Panic - LOCATE_3BL_CC 
Post 86 - Panic - EXTERNAL 
Post B6 - Panic - DECODE_FUSES 
Post 86 - Panic - EXTERNAL 
Post A6 - Panic - LOCATE_3BL_CC 
Post 86 - Panic - EXTERNAL 
Post B6 - Panic - DECODE_FUSES 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Most Fails(cumulative): 0xA0
Shutdown

About to connect to TV and post back. Definitely appears a ton better.

 

[gavin_darkglide]

it is successfully glitching so this is a problem with the jtag wiring.

 

[Nadles]

it is successfully glitching so this is a problem with the jtag wiring.

Nope. Just booted into Xell. I'm mad that I didn't notice it changed. It was like in between Mid and 330. God. It appears to be working now. Let me check if CPU Key on screen is correct. Thanks for noticing that switch had moved.

 

[gavin_darkglide]

no problem...... crazy how some times another set of eyes catch something completely obvious that other people miss. well congrats on the successful RJTAG install. I suggest you also install a demon.

 

[Nadles]

no problem...... crazy how some times another set of eyes catch something completely obvious that other people miss. well congrats on the successful RJTAG install. I suggest you also install a demon.

That is the plan I have a Slim Demon sitting around I might wire install. That was the intention till I got the console and realized it's a BB Jasper so I'll have to fork up the money haha. Thanks man. I'm typing in the CPU Key and it doesn't even try to make sure it is the right one until I try to build an Image and it tells me it is incorrect. This new J-Runner.

I'm Downloading an older version and trying to add it to that and see but I think I can handle it from here.

I apologize, My stress level and sleepiness killed me on this one ha.

All is well. Cpu Key Checked Out. Good To Go. Thanks Guys.

 

[Nadles]

Fixed and CLOSED.