Aud Clamp Qsb alt? Cr4xl Jasper bb not booting xell...

tegezee · Aug 22, 2015

[JASPER] Cr4xl not booting xell...

I've tried coolshrimps version & boxxdr version & both of them yield the same outcome. I don't have qsb so I've been trying to find a working alt. I've also tried rgh2+ (& all 16 options) but I just cannot get this console to boot xell (endless glitch cycles). This console is very stubborn, the console works just fine if I write back the stock nand. I'm just at a loss with this one, I've done so many of these & I just decided to seek some help from the community to see if I've looked over something.

JRP LOG

Code:

Friday, August 21, 2015 8:41:11 PM

J-Runner v0.3 Beta (7) Started




WARNING! - Your selected working directory already contains files!
You can view these files by using 'Show Working Folder' Button




Checking Files
Finished Checking Files
Initializing nanddump1.bin..
Jasper BB
Jtag Selected
Nand Initialization Finished
Glitch2 Selected
CR4 Selected
Jasper 256MB Manually Selected
Version: 10
Flash Config: 0x00AA3020
Writing Nand
JASPER_CR4.ecc
Done!
in 0:18 min:sec


Initializing nanddump1.bin..
Jasper BB
Jtag Selected
Nand Initialization Finished
Initializing nanddump1.bin..
Jasper BB
Nand Initialization Finished
Comparing...Takes a while on big nands
Nands are the same
Glitch2 Selected
Jasper 256MB Manually Selected
ECC created
Jasper 256MB Manually Selected
Version: 10
Flash Config: 0x00AA3020
Writing Nand
image_00000000.ecc
Done!
in 0:17 min:sec


Initializing nanddump1.bin..
Jasper BB
Jtag Selected
Nand Initialization Finished
Jasper 256MB Manually Selected
Version: 10
Flash Config: 0x00AA3020
Writing Nand
nanddump1.bin
Done!
in 13:54 min:sec


Jasper 256MB Manually Selected
Version: 03
Flash Config: 0x00AA3020
Writing Nand
nanddump1.bin
Done!
in 7:16 min:sec


Aud_Clamp Selected
R-Jtag Selected
Patching Jasper version 2.3 SMC at offset 0x12BA
XeLL file created Successfully jasper_hack_bigblock_aud_clamp.bin
Version: 03
Flash Config: 0x00AA3020
Writing Nand
jasper_hack_bigblock_aud_clamp.bin
Done!
in 0:08 min:sec

RATER

Code:

CR4 SelectedVersion: 10

Power Up
Waiting for POST to change
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 01 - . 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 15 - CONTINUING 
Post 16 - . 
Post 17 - .. 
Post 1A - ..... 
Post 1B - ...... 
Post 1D - ........ 
Post 1E - . 
Post 1F - .. 
Post 20 - ... 
Post 21 - .... 
Post 22 - . 
Post 23 - .. 
Post 24 - Entrypoint reached 
Post 25 - ... IT STOPS HERE EVERYTIME!!! 
Post 01 - . 
Post 03 - ... 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 15 - CONTINUING 
Post 16 - . 
Post 17 - .. 
Post 18 - ... 
Post 1A - ..... 
Post 1B - ...... 
Post 1C - ....... 
Post 1D - ........ 
Post 1E - . 
Post 1F - .. 
Post 20 - ... 
Post 21 - .... 
Post 22 - . 
Post 23 - .. 
Post 24 - Entrypoint reached 
Post 25 - ... IT STOPS HERE EVERYTIME!!!
Post 01 - . 
Post 03 - ... 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 15 - CONTINUING 
Post 16 - . 
Post 17 - .. 
Post 18 - ... 
Post 19 - .... 
Post 1A - ..... 
Post 1B - ...... 
Post 1C - ....... 
Post 1D - ........ 
Post 1E - . 
Post 1F - .. 
Post 20 - ... 
Post 21 - .... 
Post 22 - . 
Post 23 - .. 
Post 24 - Entrypoint reached 
Post 25 - ... IT STOPS HERE EVERYTIME!!!
Shutdown

tegezee · Aug 22, 2015

I'd appreciate any help I can get with this. I've since went to rgh2+ again. I wrote the stock image back & all is good. Now I still can't get xell to boot with cr4 ticked in Jr & trying different post bits & dips.

Nintendo · Aug 22, 2015

tegezee said:
I'd appreciate any help I can get with this. I've since went to rgh2+ again. I wrote the stock image back & all is good. Now I still can't get xell to boot with cr4 ticked in Jr & trying different post bits & dips.

Recently I've seen lots of posts of people with issues on Phat consoles.

Could you test R8C2? It should be 1Kohm

Have you ticked Aud_Clamp at jrunner?

tegezee · Aug 22, 2015

Nintendo said:
Recently I've seen lots of posts of people with issues on Phat consoles.

Could you test R8C2? It should be 1Kohm

Have you ticked Aud_Clamp at jrunner?

It reads 1.01
I've tried with aud clamp & without. I'm honestly over the rjtag method, I was trying that all day yesterday. This is by far the longest rgh/jtag I have ever done.

JR Log

Code:

===================================================Saturday, August 22, 2015 10:44:27 AM


J-Runner v0.3 Beta (7) Started




WARNING! - Your selected working directory already contains files!
You can view these files by using 'Show Working Folder' Button




Checking Files
Finished Checking Files
Initializing nanddump1.bin..
Jasper BB
Jtag Selected
Nand Initialization Finished
Comparing...Takes a while on big nands
Nands are the same
Glitch2 Selected
CR4 Selected
Jasper 256MB Manually Selected
ECC created
Jasper 256MB Manually Selected
Version: 10
Flash Config: 0x00AA3020
Writing Nand
image_00000000.ecc
Done!
in 0:18 min:sec

Rater using default dips

Code:

CR4 SelectedVersion: 10
Power Up
Waiting for POST to change
Post 0C - .......... 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Shutdown

Nintendo · Aug 22, 2015

tegezee said:
It reads 1.01
I've tried with aud clamp & without. I'm honestly over the rjtag method, I was trying that all day yesterday. This is by far the longest rgh/jtag I have ever done.

But now you installed RGH2 right? Can you see when the green led is flashing, a dim flash?
Have you tried the alternate CPU_Rst?

tegezee · Aug 22, 2015

Nintendo said:
But now you installed RGH2 right? Can you see when the green led is flashing, a dim flash?
Have you tried the alternate CPU_Rst?

The debug light is lighting up bright, but the rater kind of pauses at Post 0C - .......... then goes to Post 0D - GLITCH CHECK COMMENCE , then restarts the process.

Nintendo · Aug 22, 2015

tegezee said:
The debug light is lighting up bright, but the rater kind of pauses at Post 0C - .......... then goes to Post 0D - GLITCH CHECK COMMENCE , then restarts the process.

And what about The alternative CPU_Rst? R8C2

Have you tried with a long CPU_RST and POST_OUT?

tegezee · Aug 22, 2015

Yes I tried the alt cpu_rst when using both methods. I've never had a problem out of tx glitch chip but this one just might be defective.

Yes I've also tried longer wires even though thats supposed to be anything to mess with, with the cr4.

Nintendo · Aug 22, 2015

tegezee said:
Yes I tried the alt cpu_rst when using both methods. I've never had a problem out of tx glitch chip but this one just might be defective.

Yes I've also tried longer wires even though thats supposed to be anything to mess with, with the cr4.

Have you tried with another chip? I assume that your Xbox is connected to a TV... I think someone with more experience should enlighten us.

tegezee · Aug 22, 2015

Nintendo said:
Have you tried with another chip? I assume that your Xbox is connected to a TV... I think someone with more experience should enlighten us.

I don't have another one right now. Is there a way to just rgh2 not 2+ the console using the d cpu_rst pad? But there's no e,f pad

BL4K3Y · Aug 22, 2015

tegezee said:
Is there a way to just rgh2 not 2+ the console using the d cpu_rst pad? But there's no e,f pad

The original RGH2 hack requires I2C (E and F on older CoolRunners) which the CR4 doesn't use.

If you have re-wired for RGH2+, can you post photos please.

tegezee · Aug 23, 2015

BL4K3Y said:
The original RGH2 hack requires I2C (E and F on older CoolRunners) which the CR4 doesn't use.

If you have re-wired for RGH2+, can you post photos please.

JR LOG

Code:

===================================================Saturday, August 22, 2015 9:15:06 PM


J-Runner v0.3 Beta (7) Started




WARNING! - Your selected working directory already contains files!
You can view these files by using 'Show Working Folder' Button




Checking Files
Finished Checking Files
Initializing nanddump1.bin..
Jasper BB
Jtag Selected
Nand Initialization Finished
Glitch2 Selected
CR4 Selected
Jasper 256MB Manually Selected
ECC created
Jasper 256MB Manually Selected
Version: 03
Flash Config: 0x00AA3020
Writing Nand
image_00000000.ecc
Done!
in 0:08 min:sec

RATER 48 cycles on default dips & postbit with a 10 cap!!!

Code:

CR4 Selected
Version: 10
Power Up
Waiting for POST to change
Post 01 - . 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 01 - . 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Shutdown

tegezee · Aug 23, 2015

I have noticed that the cr4 glitches every 4-5 secs but every 3 secs you can see the debug light faintly light up, then on the 4th sec it glitches as normal.
I just played gta v for about an hour & a half & the console isn't red ringed or anything.

tegezee · Aug 25, 2015

Something is definitely wrong with this cr4. I just installed it into another jasper (rgh2+) & its doing the same thing. This f**king sucks...

tegezee · Sep 13, 2015

Got another chip, same damn thing. I'm thinking when jr creates the ecc file it's writing a corrupted ecc. Is there a prepacked rar or zip of know working ecc files?

Nintendo · Sep 13, 2015

tegezee said:
Got another chip, same damn thing. I'm thinking when jr creates the ecc file it's writing a corrupted ecc. Is there a prepacked rar or zip of know working ecc files?

I can send you my Ecc folder, work for sure, but With Jasper, Aud_Clamp doesn't work really well, have you tried to remove it?

My Eccs: https://drive.google.com/file/d/0B2h6i2ukTX75M1gybWFIeVpPb1k/view?usp=sharing

If you are using RGH2+, let's see if the new Ecc works

tegezee · Sep 14, 2015

Nintendo said:
I can send you my Ecc folder, work for sure, but With Jasper, Aud_Clamp doesn't work really well, have you tried to remove it?

My Eccs: https://drive.google.com/file/d/0B2h6i2ukTX75M1gybWFIeVpPb1k/view?usp=sharing

If you are using RGH2+, let's see if the new Ecc works

Thanks man, yeah I've tried with & without, still no go. I'm about to try these ecc files

tegezee · Sep 14, 2015

No go, stops A Post 0D - GLITCH CHECK COMMENCE everytime.

tegezee · Sep 24, 2015

Does anyone know why the cr4xl isn't working on 256mb jasper's? There is something with either the coding on the ic or the ecc file made for the bb 256mb jasper. I just installed again on another 256 jasper & the same results. I've tried every cap/dip/post bit setting there is & it's still not even booting xell. My soldering is great & I've been doing several slims & a few falcons that just work with the bare minimal settings but the 256 jasper there is a problem.
Any help is appreciated.

Taijigamer2 · Sep 24, 2015

Another possibility could be the cpu needs a reflow. The cpu_rst point isn't required in retail xbox so won't have been put through QC tests. Just a long shot but it looks like u have tried everything else.

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Aud Clamp Qsb alt? Cr4xl Jasper bb not booting xell...

tegezee

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Nintendo

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Nintendo

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Nintendo

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BL4K3Y

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Nintendo

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