cant boot to xell (rrod 0010)

D

dean18

Noob Account
Dec 3, 2010
2
0
Germany.
www.nitestar.de
hi,
i need help i have. i can´t boot to xell everytime i get RROD 0010.
With stock nand everthink was working.
sorry for my bad englisch :)

Console Type: Jasper
NAND size: 16MB
Dashboard version: e.g 2.0.16203
J-Runner log:
Version: 10Power Up
Waiting for POST to change
Post C2 - LZX_EXPAND_2
Post C3 - LZX_EXPAND_3
Post D3 - FETCH_HEADER_CB_B
Post F3 - Panic - ENTRY_SIZE_INVALID_CB_B
Post FB
Post 83 - Panic - DATA_SEGMENT
Post FB
Post F3 - Panic - ENTRY_SIZE_INVALID_CB_B
Post 83 - Panic - DATA_SEGMENT
Post F3 - Panic - ENTRY_SIZE_INVALID_CB_B
Post 83 - Panic - DATA_SEGMENT
Post FB
Post F3 - Panic - ENTRY_SIZE_INVALID_CB_B
Post 83 - Panic - DATA_SEGMENT
Post B3 - Panic - SHA_VERIFY
Post 83 - Panic - DATA_SEGMENT
Post FB
Post F3 - Panic - ENTRY_SIZE_INVALID_CB_B
Post 83 - Panic - DATA_SEGMENT
Post F3 - Panic - ENTRY_SIZE_INVALID_CB_B
Post 83 - Panic - DATA_SEGMENT
Post F3 - Panic - ENTRY_SIZE_INVALID_CB_B
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post FC
Post FB
Post F8
Post FC
Post FB
Post F8
Post FC
Post F8
Post 80
Post F8
Post F0 - Panic - VERIFY_OFFSET_CB_B
Post 88 - Panic - PROGRAM
Post F8
Post 80
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post F8
Post F8
Post FB
Post F8
Post FA
Post F8
Post F8
Post F8
Post F8
Post F8
Post F8
Post F8
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post F8
Post FA
Post FA
Post FC
Post F8
Post F8
Post F8
Post FB
Post F8
Post F8
Post F8
Post F8
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post F8
Post F8
Post FC
Post F0 - Panic - VERIFY_OFFSET_CB_B
Post 88 - Panic - PROGRAM
Post F8
Post F8
Post F8
Post FC
Post F8
Post F8
Post F8
Post FC
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post FC
Post F8
Post FB
Post F8
Post F8
Post F8
Post FC
Post F8
Post F8
Post F8
Post FB
Post 80
Post FD
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post FE
Post F8
Post F8
Post F8
Post F8
Post 80
Post F8
Post F8
Post F8
Post FC
Post F8
Post F8
Post F8
Post FB
Post F8
Post F0 - Panic - VERIFY_OFFSET_CB_B
Post E0
Post A0 - Panic - VERIFY_SECOTP_6
Shutdown
Version: 10
Power Up
Waiting for POST to change
Post C3 - LZX_EXPAND_3
Post D3 - FETCH_HEADER_CB_B
Post F3 - Panic - ENTRY_SIZE_INVALID_CB_B
Post FB
Post 83 - Panic - DATA_SEGMENT
Post 03
Post FB
Post 83 - Panic - DATA_SEGMENT
Post 03
Post FB
Post 83 - Panic - DATA_SEGMENT
Post FB
Post 03
Post 73 - INIT_SATA_DRIVER
Post 03
Post FB
Post F3 - Panic - ENTRY_SIZE_INVALID_CB_B
Post 03
Post 83 - Panic - DATA_SEGMENT
Post 03
Post F3 - Panic - ENTRY_SIZE_INVALID_CB_B
Post FB
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 80
Post F8
Post F8
Post F8
Post F8
Post F8
Post F8
Post FA
Post F8
Post FC
Post F8
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post F8
Post FA
Post F8
Post FE
Post F8
Post F8
Post F8
Post F8
Post FC
Post F8
Post F8
Post 80
Post F8
Post B0 - Panic - VERIFY_CONSOLE_TYPE
Post F8
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 80
Post F8
Post F8
Post F8
Post FC
Post F8
Post F8
Post F8
Post FC
Post F8
Post FC
Post FC
Post 80
Post F8
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post FC
Post F8
Post F8
Post F8
Post FC
Post F8
Post F8
Post F8
Post F8
Post F8
Post E8
Post F8
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 80
Post FC
Post F8
Post FC
Post F8
Post F8
Post F8
Post F8
Post F8
Post F8
Post F8
Post F8
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post F8
Post F8
Post FC
Post F8
Post F8
Post F8
Post F8
Post F8
Post F8
Post F8
Post FB
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post F8
Post FD
Post 80
Post F8
Post F8
Post 80
Post FC
Post F8
Post 70 - INIT_VIDEO_DRIVER
Post FA
Post F8
Post F8
Post F8
Post FC
Post 80
Post FC
Post F8
Post F0 - Panic - VERIFY_OFFSET_CB_B
Post E0
Post A0 - Panic - VERIFY_SECOTP_6
Post E0
Shutdown
Click to expand...


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Last edited:
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