Falcon no glitch

JEFFreal

Full Member
Jan 9, 2006
92
0
Holland
Console Type: Falcon
NAND size: 16
Dashboard version: 2.0.16537
CB version: e.g 5774
Description of problem:
No glitch wont boot
Was the console working before you started: Y


Hello,

Got a falcon for rjtag, but no jtag tx board so i did the jtag with diodes. Xell is written with only the rjtag option. Checked with mulli the post out and all work and were connected with the rjtag board (9.7k ohm and point 5 was 3.75kohm). So i think it is the jtag. Also got no green glitch. Used 100ohm resistor

Code:
Phat Selected
Device not found
Phat Selected
Version: 10
Power Up
Waiting for POST to change
http://i44.tinypic.com/25t9ni0.jpg
http://i44.tinypic.com/k0pkbl.jpg
http://i41.tinypic.com/addlpv.jpg
http://i41.tinypic.com/20puidi.jpg
http://i40.tinypic.com/2iaeqna.jpg

http://i44.tinypic.com/m8nr74.jpg (look bad comes from other board and used air heater but when i mease on the rjtag board the points it works,....)
http://i39.tinypic.com/73gqdu.jpg
http://i39.tinypic.com/2rpvc5f.jpg

Code:
Initializing nanddump1.bin..
Falcon/Opus
Jtag Selected
Nand Initialization Finished
Aud_Clamp Selected
Aud_Clamp de-Selected
R-Jtag Selected
Patching Jasper version 2.3 SMC at offset 0x12BA
XeLL file created Successfully falcon.bin
Version: 10
Flash Config: 0x01198010
Writing Nand
falcon.bin
Done!
in 0:18 min:sec
 
Last edited:

chronic1553

VIP Member
Jun 5, 2010
258
33
USA
it looks like orange is in the wrong spot, should be next to the red 5v wire. this also wouldnt be causing the issue, its for use with the rater.
 

JEFFreal

Full Member
Jan 9, 2006
92
0
Holland
it was on a zephyr that didnt workk..
But got a new rjtag kit today.
Console is glitching now but wont work got xell aud clamp written and audclamp option wired on console
Code:
Phat Selected
Version: 10
Power Up
Waiting for POST to change
Post 44 - FETCH_CONTENTS 
Post 04 
Post 24 - VERIFY_OFFSET_3BL_CC 
Post 04 
Post 24 - VERIFY_OFFSET_3BL_CC 
Post 04 
Post 24 - VERIFY_OFFSET_3BL_CC 
Post 04 
Post 24 - VERIFY_OFFSET_3BL_CC 
Post 04 
Post 24 - VERIFY_OFFSET_3BL_CC 
Post 04 
Post 24 - VERIFY_OFFSET_3BL_CC 
Post 04 
Post 24 - VERIFY_OFFSET_3BL_CC 
Post 04 
Post 24 - VERIFY_OFFSET_3BL_CC 
Post 04 
Post 24 - VERIFY_OFFSET_3BL_CC 
Post 04 
Post 24 - VERIFY_OFFSET_3BL_CC 
Post 04 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 20 - CB entry point reached 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 70 - INIT_VIDEO_DRIVER 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 20 - CB entry point reached 
Post 70 - INIT_VIDEO_DRIVER 
Post 60 - INIT_KERNEL 
Post 20 - CB entry point reached 
Post 60 - INIT_KERNEL 
Post 20 - CB entry point reached 
Post 70 - INIT_VIDEO_DRIVER 
Post 70 - INIT_VIDEO_DRIVER 
Post 70 - INIT_VIDEO_DRIVER 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 20 - CB entry point reached 
Post 70 - INIT_VIDEO_DRIVER 
Post 20 - CB entry point reached 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 70 - INIT_VIDEO_DRIVER 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 20 - CB entry point reached 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 70 - INIT_VIDEO_DRIVER 
Post 20 - CB entry point reached 
Post 70 - INIT_VIDEO_DRIVER 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 70 - INIT_VIDEO_DRIVER 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 70 - INIT_VIDEO_DRIVER 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 20 - CB entry point reached 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 20 - CB entry point reached 
Post 10 - Payload/1BL started 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 20 - CB entry point reached 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 70 - INIT_VIDEO_DRIVER 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 70 - INIT_VIDEO_DRIVER 
Post 70 - INIT_VIDEO_DRIVER 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 70 - INIT_VIDEO_DRIVER 
Post 10 - Payload/1BL started 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 60 - INIT_KERNEL 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 70 - INIT_VIDEO_DRIVER 
Post 70 - INIT_VIDEO_DRIVER 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 70 - INIT_VIDEO_DRIVER 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 70 - INIT_VIDEO_DRIVER 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 70 - INIT_VIDEO_DRIVER 
Post 70 - INIT_VIDEO_DRIVER 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 60 - INIT_KERNEL 
Post 60 - INIT_KERNEL 
Post 20 - CB entry point reached 
Post 60 - INIT_KERNEL 
Post 60 - INIT_KERNEL 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 70 - INIT_VIDEO_DRIVER 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 70 - INIT_VIDEO_DRIVER 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 70 - INIT_VIDEO_DRIVER 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 20 - CB entry point reached 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 70 - INIT_VIDEO_DRIVER 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 20 - CB entry point reached 
Post 70 - INIT_VIDEO_DRIVER 
Post 70 - INIT_VIDEO_DRIVER 
Post F0 - Panic - VERIFY_OFFSET_CB_B 
Post 70 - INIT_VIDEO_DRIVER 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 44 - FETCH_CONTENTS 
Post 74 - INIT_SHADOWBOOT 
Post 44 - FETCH_CONTENTS 
Post 64 - INIT_MEMORY_MANAGER 
Post 44 - FETCH_CONTENTS 
Post 64 - INIT_MEMORY_MANAGER 
Post 44 - FETCH_CONTENTS 
Post 64 - INIT_MEMORY_MANAGER 
Post 44 - FETCH_CONTENTS 
Post 64 - INIT_MEMORY_MANAGER 
Post 44 - FETCH_CONTENTS 
Post 64 - INIT_MEMORY_MANAGER 
Post 44 - FETCH_CONTENTS 
Post 64 - INIT_MEMORY_MANAGER 
Post 44 - FETCH_CONTENTS 
Post 64 - INIT_MEMORY_MANAGER 
Post 44 - FETCH_CONTENTS 
Post 64 - INIT_MEMORY_MANAGER 
Post 44 - FETCH_CONTENTS 
Post 64 - INIT_MEMORY_MANAGER 
Post 44 - FETCH_CONTENTS 
Post 64 - INIT_MEMORY_MANAGER 
Post 44 - FETCH_CONTENTS 
Post 74 - INIT_SHADOWBOOT 
Post 44 - FETCH_CONTENTS 
Post 04 
Post 12 - FSB_CONFIG_RX_STATE 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post FE 
Post DE 
Post CA 
Post C2 - LZX_EXPAND_2 
Post C0
 
Last edited:

JEFFreal

Full Member
Jan 9, 2006
92
0
Holland
after some dip settings 4 on 7 on and 1.2 v i get this with rrod 1033 error code

Code:
Phat Selected
Version: 10
Power Up
Waiting for POST to change
Post 74 - INIT_SHADOWBOOT 
Post 44 - FETCH_CONTENTS 
Post 74 - INIT_SHADOWBOOT 
Post 44 - FETCH_CONTENTS 
Post 74 - INIT_SHADOWBOOT 
Post 44 - FETCH_CONTENTS 
Post 74 - INIT_SHADOWBOOT 
Post 44 - FETCH_CONTENTS 
Post 74 - INIT_SHADOWBOOT 
Post 44 - FETCH_CONTENTS 
Post 74 - INIT_SHADOWBOOT 
Post 44 - FETCH_CONTENTS 
Post 74 - INIT_SHADOWBOOT 
Post 44 - FETCH_CONTENTS 
Post 74 - INIT_SHADOWBOOT 
Post 44 - FETCH_CONTENTS 
Post 74 - INIT_SHADOWBOOT 
Post 44 - FETCH_CONTENTS 
Post 74 - INIT_SHADOWBOOT 
Post 44 - FETCH_CONTENTS 
Post 74 - INIT_SHADOWBOOT 
Post 44 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 04 
Post 04 
Post FC 
Post 04 
Post 04 
Post FE 
Post 04 
Post 04 
Post 04 
Post 05 
Post FD 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 04 
Post 8C - Panic - SYSTEM_CALL 
Post FE 
Post FC 
Post 04 
Post 0C 
Post FC 
Post 04 
Post 04 
Post FC 
Post FD 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Post 70 - INIT_VIDEO_DRIVER 
Post 71 - INIT_AUDIO_DRIVER 
Post 73 - INIT_SATA_DRIVER 
Post 79 - LOAD_XAM 
Most Fails(cumulative): 0xA0
Shutdown
 
Last edited:

JEFFreal

Full Member
Jan 9, 2006
92
0
Holland
can someone tell me what this means got the console working it boots. But when i want to use the rater setting to get better results i get this

Code:
Phat Selected
Version: 10
Power Up
Waiting for POST to change
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 04 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 24 - VERIFY_OFFSET_3BL_CC 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 24 - VERIFY_OFFSET_3BL_CC 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 24 - VERIFY_OFFSET_3BL_CC 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 04 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 24 - VERIFY_OFFSET_3BL_CC 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 24 - VERIFY_OFFSET_3BL_CC 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 24 - VERIFY_OFFSET_3BL_CC 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 24 - VERIFY_OFFSET_3BL_CC 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 24 - VERIFY_OFFSET_3BL_CC 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 24 - VERIFY_OFFSET_3BL_CC 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post FC 
Post F8 
Post FC 
Post F9 
Post FC 
Post FE 
Post F8 
Post FC 
Post FB 
Post FC 
Post 80 
Post 88 - Panic - PROGRAM 
Post 08 
Post FE 
Post FA 
Post 08 
Post 80 
Post FC 
Post 80 
Post 88 - Panic - PROGRAM 
Post F8 
Post 08 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 41 - VERIFY_OFFSET 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 23 - INIT_SYSRAM 
Post 31 - FETCH_HEADER_4BL_CD 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 4B - LZX_EXPAND 
Post 4D - DECODE_FUSES 
Post 51 - LOAD_UPDATE_2 
Post 52 - BRANCH 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 5B - INIT_KEYRING 
Post 5C - INIT_KEYS 
Post 5F 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Shutdown
Power Up
Waiting for POST to change
Post 6A - INIT_HAL_PHASE_1 
TIMEOUT or SMC CORRUPTED - Shutting Down
Shutdown
it hangs....
its says shutdown but it doesnt (is that normal when rater give that message)
 
Last edited:

xzanox

VIP Member
Nov 1, 2011
905
48
Netherlands, 1336
Better read thru the tutorial again then... I mean if you don't really know how to use it, then don't use it unless you've read more about it.