Console Type: Falcon
NAND size: 16
Dashboard version: 2.0.16202
CB version: 5774
AUD_CLAMP: YES
Dip Settings: All default as per guide
Screenshot of NAND details from J-Runner:

J-Runner log:
Will also update, Nothing unusual but I think the most important were:
And something that seemed akward:
Nand dumps compared fine (4 of them)
POST output from J-Runner (RATER output):
updflash.bin log (if applicable):n/a
Image of R-JTAG board:

This was the previous install, the last install I only made the connections look a bit better.
Images of close-up soldering to motherboard:






- I did clean the JTAG Alt soldering points after the photo was taken
Description of problem:
The console booted Xell the very first time and I was able to get the CPU key. Now its not booting to Xell, or with the Eject Button, and neither to the dashboard. When JRP V2 and Post QSB Ribbon is connected, it Posts until 79 (as above) with Single Red light (bottom left). Without these it just keeps on glitching (you can hear by the quick and sudden change of fan speed) and not booting.
Steps taken to possibly resolve:
- I recheked all of my soldering, and tested continuity on each and every point, including the PCB's themselves. If found all had continuity and NO bridged connections.
- Flashed back to Stock Nand with everything connected, boots like a normal Xbox
- De-soldered, removed and reinstalled the whole kit, no difference
- Tried without AUD_CLAMP, Tried CPU_RST point on bottom, Changed Voltages, Numerous dip settings, 3-way switch at JTAG Alt. (Might be more, spend more than 30 hours on it) Found the default settings to render a more "stable result"
- Flashed dash to 16537, it changed the CB version to 5770, but with exact same POST results.
Was the console working before you started: Yes
NAND size: 16
Dashboard version: 2.0.16202
CB version: 5774
AUD_CLAMP: YES
Dip Settings: All default as per guide
Screenshot of NAND details from J-Runner:

J-Runner log:
Will also update, Nothing unusual but I think the most important were:
Code:
Bad Block ID 01EA Found @ 0x03FF [Offset: 0x107BE00]
Bad Block ID 01EB Found @ 0x03FE [Offset: 0x1077C00]
Bad Block ID 0250 Found @ 0x03FD [Offset: 0x1073A00]
Bad Block ID 0251 Found @ 0x03FC [Offset: 0x106F800]
Block ID 03FF [Offset: 0x107BE00] remapped to Block ID 01EA [Offset: 0x7E5400]
Block ID 03FE [Offset: 0x1077C00] remapped to Block ID 01EB [Offset: 0x7E9600]
Block ID 03FD [Offset: 0x1073A00] remapped to Block ID 0250 [Offset: 0x98A000]
Block ID 03FC [Offset: 0x106F800] remapped to Block ID 0251 [Offset: 0x98E200]
Bad Blocks Remapped
Code:
Couldn't add dashlaunch patches to (Cant rememeber exact directory) ...glitch2m.ini
Code:
******* WARNING: could not patch SMC reset limit!
Code:
KV type : type2 (hashed - unchecked, master key not available)
POST output from J-Runner (RATER output):
Code:
Phat Selected
Version: 10
Power Up
Waiting for POST to change
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post 87 - Panic - ALIGNMENT
Post 70 - INIT_VIDEO_DRIVER
Post 78 - INIT_STFS_DRIVER
Post 78 - INIT_STFS_DRIVER
Post 78 - INIT_STFS_DRIVER
Post 78 - INIT_STFS_DRIVER
Post 7C
Post 78 - INIT_STFS_DRIVER
Post 7C
Post 78 - INIT_STFS_DRIVER
Post 78 - INIT_STFS_DRIVER
Post 78 - INIT_STFS_DRIVER
Post 7C
Post 70 - INIT_VIDEO_DRIVER
Post 78 - INIT_STFS_DRIVER
Post 10 - Payload/1BL started
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post 87 - Panic - ALIGNMENT
Post 70 - INIT_VIDEO_DRIVER
Post 78 - INIT_STFS_DRIVER
Post 78 - INIT_STFS_DRIVER
Post 78 - INIT_STFS_DRIVER
Post 78 - INIT_STFS_DRIVER
Post 78 - INIT_STFS_DRIVER
Post 78 - INIT_STFS_DRIVER
Post 78 - INIT_STFS_DRIVER
Post 30 - VERIFY_OFFSET_4BL_CD
Post 78 - INIT_STFS_DRIVER
Post 7C
Post 78 - INIT_STFS_DRIVER
Post 78 - INIT_STFS_DRIVER
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post 22 - INIT_SECENG
Post 2F - RELOCATE
Post 2E - HWINIT
Post 31 - FETCH_HEADER_4BL_CD
Post 33 - FETCH_CONTENTS_4BL_CD
Post 34 - HMACSHA_COMPUTE_4BL_CD
Post 35 - RC4_INITIALIZE_4BL_CD
Post 36 - RC4_DECRYPT_4BL_CD
Post 37 - SHA_COMPUTE_4BL_CD
Post 3A - BRANCH
Post 40 - Entrypoint of CD reached
Post 44 - FETCH_CONTENTS
Post 45 - HMACSHA_COMPUTE
Post 46 - RC4_INITIALIZE
Post 47 - RC4_DECRYPT
Post 48 - SHA_COMPUTE
Post 4B - LZX_EXPAND
Post 4E - FETCH_OFFSET_6BL_CF
Post 4F - VERIFY_OFFSET_6BL_CF
Post 51 - LOAD_UPDATE_2
Post 50 - LOAD_UPDATE_1
Post 52 - BRANCH
Post 58 - INIT_HYPERVISOR
Post 5A - INIT_XEX_TRAINING
Post 61 - INIT_HAL_PHASE_0
Post 62 - INIT_PROCESS_OBJECTS
Post 63 - INIT_KERNEL_DEBUGGER
Post 64 - INIT_MEMORY_MANAGER
Post 65 - INIT_STACKS
Post 66 - INIT_OBJECT_SYSTEM
Post 67 - INIT_PHASE1_THREAD
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS
Post 69 - INIT_KEY_VAULT
Post 6A - INIT_HAL_PHASE_1
Post 6C - INIT_SECURITY
Post 6D - INIT_KEY_EX_VAULT
Post 6E - INIT_SETTINGS
Post 6F - INIT_POWER_MODE
Post 70 - INIT_VIDEO_DRIVER
Post 71 - INIT_AUDIO_DRIVER
Post 73 - INIT_SATA_DRIVER
Post 75 - INIT_DUMP_SYSTEM
Post 77 - INIT_OTHER_DRIVERS
Post 78 - INIT_STFS_DRIVER
Post 79 - LOAD_XAM
Shutdown
Power Up
Waiting for POST to change
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post 22 - INIT_SECENG
Post 2F - RELOCATE
Post 2E - HWINIT
Post 33 - FETCH_CONTENTS_4BL_CD
Post 34 - HMACSHA_COMPUTE_4BL_CD
Post 35 - RC4_INITIALIZE_4BL_CD
Post 36 - RC4_DECRYPT_4BL_CD
Post 37 - SHA_COMPUTE_4BL_CD
Post 3A - BRANCH
Post 40 - Entrypoint of CD reached
Post 41 - VERIFY_OFFSET
Post 44 - FETCH_CONTENTS
Post 45 - HMACSHA_COMPUTE
Post 46 - RC4_INITIALIZE
Post 47 - RC4_DECRYPT
Post 48 - SHA_COMPUTE
Post 49 - SHA_VERIFY
Post 4B - LZX_EXPAND
Post 4E - FETCH_OFFSET_6BL_CF
Post 4F - VERIFY_OFFSET_6BL_CF
Post 51 - LOAD_UPDATE_2
Post 50 - LOAD_UPDATE_1
Post 52 - BRANCH
Post 58 - INIT_HYPERVISOR
Post 5A - INIT_XEX_TRAINING
Post 61 - INIT_HAL_PHASE_0
Post 63 - INIT_KERNEL_DEBUGGER
Post 64 - INIT_MEMORY_MANAGER
Post 65 - INIT_STACKS
Post 66 - INIT_OBJECT_SYSTEM
Post 67 - INIT_PHASE1_THREAD
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS
Post 69 - INIT_KEY_VAULT
Post 6A - INIT_HAL_PHASE_1
Shutdown
Power Up
Waiting for POST to change
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post 22 - INIT_SECENG
Post 30 - VERIFY_OFFSET_4BL_CD
Post 78 - INIT_STFS_DRIVER
Post 78 - INIT_STFS_DRIVER
Post 78 - INIT_STFS_DRIVER
Post 7C
Post 78 - INIT_STFS_DRIVER
Post FC
Post 38 - SIG_VERIFY_4BL_CD
Post FC
Post 7C
Post 7C
Post 08
Post 7C
Post FC
Post 10 - Payload/1BL started
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post 87 - Panic - ALIGNMENT
Post 78 - INIT_STFS_DRIVER
Post 38 - SIG_VERIFY_4BL_CD
Post 78 - INIT_STFS_DRIVER
Post 78 - INIT_STFS_DRIVER
Post 7E
Post 78 - INIT_STFS_DRIVER
Post 78 - INIT_STFS_DRIVER
Post 7C
Post 7C
Post 7C
Post 7C
Post 7C
Post 7C
Post 10 - Payload/1BL started
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post 22 - INIT_SECENG
Post 2F - RELOCATE
Post 2E - HWINIT
Post 38 - SIG_VERIFY_4BL_CD
Post 70 - INIT_VIDEO_DRIVER
Post 78 - INIT_STFS_DRIVER
Post 78 - INIT_STFS_DRIVER
Post 78 - INIT_STFS_DRIVER
Post 78 - INIT_STFS_DRIVER
Post 7C
Post 7C
Post 78 - INIT_STFS_DRIVER
Post 30 - VERIFY_OFFSET_4BL_CD
Post 7C
Post FC
Post 7C
Post 7C
Post 48 - SHA_COMPUTE
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post 22 - INIT_SECENG
Post 2F - RELOCATE
Post 2E - HWINIT
Post 31 - FETCH_HEADER_4BL_CD
Post 33 - FETCH_CONTENTS_4BL_CD
Post 35 - RC4_INITIALIZE_4BL_CD
Post 36 - RC4_DECRYPT_4BL_CD
Post 37 - SHA_COMPUTE_4BL_CD
Post 39 - SHA_VERIFY_4BL_CD
Post 3A - BRANCH
Post 40 - Entrypoint of CD reached
Post 42 - FETCH_HEADER
Post 44 - FETCH_CONTENTS
Post 45 - HMACSHA_COMPUTE
Post 46 - RC4_INITIALIZE
Post 47 - RC4_DECRYPT
Post 48 - SHA_COMPUTE
Post 4B - LZX_EXPAND
Post 4E - FETCH_OFFSET_6BL_CF
Post 4F - VERIFY_OFFSET_6BL_CF
Post 51 - LOAD_UPDATE_2
Post 50 - LOAD_UPDATE_1
Post 52 - BRANCH
Post 58 - INIT_HYPERVISOR
Post 5A - INIT_XEX_TRAINING
Post 60 - INIT_KERNEL
Post 61 - INIT_HAL_PHASE_0
Post 63 - INIT_KERNEL_DEBUGGER
Post 64 - INIT_MEMORY_MANAGER
Post 65 - INIT_STACKS
Post 66 - INIT_OBJECT_SYSTEM
Post 67 - INIT_PHASE1_THREAD
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS
Post 69 - INIT_KEY_VAULT
Post 6A - INIT_HAL_PHASE_1
Post 6B - INIT_SFC_DRIVER
Post 6C - INIT_SECURITY
Post 6D - INIT_KEY_EX_VAULT
Post 6E - INIT_SETTINGS
Post 6F - INIT_POWER_MODE
Post 70 - INIT_VIDEO_DRIVER
Post 71 - INIT_AUDIO_DRIVER
Post 73 - INIT_SATA_DRIVER
Post 76 - INIT_SYSTEM_ROOT
Post 77 - INIT_OTHER_DRIVERS
Post 78 - INIT_STFS_DRIVER
Post 79 - LOAD_XAM
Shutdown
Power Up
Waiting for POST to change
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post 22 - INIT_SECENG
Post 2F - RELOCATE
Post 2E - HWINIT
Post 33 - FETCH_CONTENTS_4BL_CD
Post 34 - HMACSHA_COMPUTE_4BL_CD
Post 35 - RC4_INITIALIZE_4BL_CD
Post 36 - RC4_DECRYPT_4BL_CD
Post 37 - SHA_COMPUTE_4BL_CD
Post 3A - BRANCH
Post 40 - Entrypoint of CD reached
Post 42 - FETCH_HEADER
Post 44 - FETCH_CONTENTS
Post 45 - HMACSHA_COMPUTE
Post 46 - RC4_INITIALIZE
Post 47 - RC4_DECRYPT
Post 48 - SHA_COMPUTE
Post 4B - LZX_EXPAND
Post 4E - FETCH_OFFSET_6BL_CF
Post 4F - VERIFY_OFFSET_6BL_CF
Post 51 - LOAD_UPDATE_2
Post 50 - LOAD_UPDATE_1
Post 52 - BRANCH
Post 58 - INIT_HYPERVISOR
Post 59 - INIT_SOC_MMIO
Post 5A - INIT_XEX_TRAINING
Post 61 - INIT_HAL_PHASE_0
Post 63 - INIT_KERNEL_DEBUGGER
Post 64 - INIT_MEMORY_MANAGER
Post 65 - INIT_STACKS
Post 66 - INIT_OBJECT_SYSTEM
Post 67 - INIT_PHASE1_THREAD
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS
Post 69 - INIT_KEY_VAULT
Post 6A - INIT_HAL_PHASE_1
Post 6B - INIT_SFC_DRIVER
Post 6C - INIT_SECURITY
Post 6D - INIT_KEY_EX_VAULT
Post 6E - INIT_SETTINGS
Post 6F - INIT_POWER_MODE
Post 70 - INIT_VIDEO_DRIVER
Post 71 - INIT_AUDIO_DRIVER
Post 73 - INIT_SATA_DRIVER
Post 76 - INIT_SYSTEM_ROOT
Post 77 - INIT_OTHER_DRIVERS
Post 78 - INIT_STFS_DRIVER
Post 79 - LOAD_XAM
Shutdown
Power Up
Waiting for POST to change
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post 87 - Panic - ALIGNMENT
Post 30 - VERIFY_OFFSET_4BL_CD
Post 78 - INIT_STFS_DRIVER
Post 78 - INIT_STFS_DRIVER
Post 58 - INIT_HYPERVISOR
Post 78 - INIT_STFS_DRIVER
Post 78 - INIT_STFS_DRIVER
Post 78 - INIT_STFS_DRIVER
Post 7C
Post 78 - INIT_STFS_DRIVER
Post 7C
Post FC
Post 7C
Post 7C
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post 22 - INIT_SECENG
Post 2F - RELOCATE
Post 2E - HWINIT
Post 33 - FETCH_CONTENTS_4BL_CD
Post 34 - HMACSHA_COMPUTE_4BL_CD
Post 35 - RC4_INITIALIZE_4BL_CD
Post 36 - RC4_DECRYPT_4BL_CD
Post 37 - SHA_COMPUTE_4BL_CD
Post 3A - BRANCH
Post 40 - Entrypoint of CD reached
Post 42 - FETCH_HEADER
Post 44 - FETCH_CONTENTS
Post 45 - HMACSHA_COMPUTE
Post 46 - RC4_INITIALIZE
Post 47 - RC4_DECRYPT
Post 48 - SHA_COMPUTE
Post 4B - LZX_EXPAND
Post 4E - FETCH_OFFSET_6BL_CF
Post 4F - VERIFY_OFFSET_6BL_CF
Post 51 - LOAD_UPDATE_2
Post 50 - LOAD_UPDATE_1
Post 52 - BRANCH
Post 58 - INIT_HYPERVISOR
Post 5A - INIT_XEX_TRAINING
Post 61 - INIT_HAL_PHASE_0
Post 63 - INIT_KERNEL_DEBUGGER
Post 64 - INIT_MEMORY_MANAGER
Post 65 - INIT_STACKS
Post 66 - INIT_OBJECT_SYSTEM
Post 67 - INIT_PHASE1_THREAD
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS
Post 69 - INIT_KEY_VAULT
Post 6A - INIT_HAL_PHASE_1
Post 6B - INIT_SFC_DRIVER
Post 6C - INIT_SECURITY
Post 6D - INIT_KEY_EX_VAULT
Post 6E - INIT_SETTINGS
Post 6F - INIT_POWER_MODE
Post 70 - INIT_VIDEO_DRIVER
Post 71 - INIT_AUDIO_DRIVER
Post 72 - INIT_BOOT_ANIMATION + XMADecoder & XAudioRender Init
Post 73 - INIT_SATA_DRIVER
Post 77 - INIT_OTHER_DRIVERS
Post 78 - INIT_STFS_DRIVER
Post 79 - LOAD_XAM
Shutdown
[B]Glitch Info:[/B]
1, 1, 2, 1, 1,
[B]
Score:[/B]
Overall: 5 / 10
Average: 1,20
Median: 1
Score: 9,60
Cycle 1 - 40,00%
Cycle 2 - 10,00%
100% within 2 Cycles
updflash.bin log (if applicable):n/a
Image of R-JTAG board:

This was the previous install, the last install I only made the connections look a bit better.
Images of close-up soldering to motherboard:






- I did clean the JTAG Alt soldering points after the photo was taken
Description of problem:
The console booted Xell the very first time and I was able to get the CPU key. Now its not booting to Xell, or with the Eject Button, and neither to the dashboard. When JRP V2 and Post QSB Ribbon is connected, it Posts until 79 (as above) with Single Red light (bottom left). Without these it just keeps on glitching (you can hear by the quick and sudden change of fan speed) and not booting.
Steps taken to possibly resolve:
- I recheked all of my soldering, and tested continuity on each and every point, including the PCB's themselves. If found all had continuity and NO bridged connections.
- Flashed back to Stock Nand with everything connected, boots like a normal Xbox
- De-soldered, removed and reinstalled the whole kit, no difference
- Tried without AUD_CLAMP, Tried CPU_RST point on bottom, Changed Voltages, Numerous dip settings, 3-way switch at JTAG Alt. (Might be more, spend more than 30 hours on it) Found the default settings to render a more "stable result"
- Flashed dash to 16537, it changed the CB version to 5770, but with exact same POST results.
Was the console working before you started: Yes
Last edited: