FIXED Falcon with RJTAG not show Xell and 1 red Light Seems to glitch fine!

V

ViggoM

Full Member
Jul 12, 2011
36
0
Hi!, First of all sorry for my bad english. i have a problem with a Falcon... i install everything, read NAND perfect, Write Xell but... xell never shows and i get one red light. Here's the template

Console Type: Falcon
NAND size: 16
Dashboard version: 2.0.16537
CB version: 5774
Screenshot of NAND details from J-Runner:
rjtag001.png
J-Runner log:
miércoles, 09 de octubre de 2013 15:43:21


J-Runner v0.3 Beta (2) Started






Checking Files
Finished Checking Files
Version: 03
Flash Config: 0x01198010
01198010
Xenon, Zephyr, Opus, Falcon
CB Version: 5774
Falcon/Opus
Reading Nand to D:\XBox\RGH\J-Runner\output\nanddump1.bin
Reading Nand
Done!
in 1:59 min:sec


Reading Nand to D:\XBox\RGH\J-Runner\output\nanddump2.bin
Initializing nanddump1.bin..
Falcon/Opus
Reading Nand
Jtag Selected
Nand Initialization Finished
Done!
in 1:59 min:sec


Comparing...
Nands are the same
R-Jtag Selected
Aud_Clamp Selected
Patching Jasper version 2.3 SMC at offset 0x12BA
XeLL file created Successfully falcon_hack_aud_clamp.bin
Version: 03
Flash Config: 0x01198010
Writing Nand
falcon_hack_aud_clamp.bin
Done!
in 0:09 min:sec


R-Jtag de-Selected
R-Jtag Selected
Aud_Clamp de-Selected
Aud_Clamp Selected
Patching Jasper version 2.3 SMC at offset 0x12BA
XeLL file created Successfully falcon_hack_aud_clamp.bin
Version: 03
Flash Config: 0x01198010
Writing Nand
falcon_hack_aud_clamp.bin
Done!
in 0:09 min:sec


Version: 03
Flash Config: 0x01198010
Writing Nand
nanddump1.bin
Done!
in 1:53 min:sec


R-Jtag de-Selected
Aud_Clamp de-Selected
Retail Selected
Jtag Selected
Aud_Clamp Selected
XeLL file created Successfully falcon_hack_aud_clamp.bin
Version: 03
Flash Config: 0x01198010
Writing Nand
falcon_hack_aud_clamp.bin
Done!
in 0:09 min:sec


Aud_Clamp de-Selected
Initializing nanddump1.bin..
Falcon/Opus
Nand Initialization Finished
R-Jtag Selected
Patching Jasper version 2.3 SMC at offset 0x12BA
XeLL file created Successfully falcon.bin
Version: 03
Flash Config: 0x01198010
Writing Nand
falcon.bin
Done!
in 0:09 min:sec
Click to expand...

POST output from J-Runner (either POST_OUT monitor or RATER output):
Phat SelectedVersion: 10
Power Up
Waiting for POST to change
Post FD
Post F9
Post F1 - Panic - VERIFY_HEADER_CB_B
Post D1 - READ_FUSES
Post 91 - Panic - THERMAL_MANAGEMENT
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 10 - Payload/1BL started
Post 06
Post 26 - FETCH_HEADER_3BL_CC
Post 6E - INIT_SETTINGS
Post EE
Post FE
Post FD
Post F9
Post D9 - SHA_COMPUTE_CB_B
Post D1 - READ_FUSES
Post 91 - Panic - THERMAL_MANAGEMENT
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 01
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post 22 - INIT_SECENG
Post 2F - RELOCATE
Post 2E - HWINIT
Post 31 - FETCH_HEADER_4BL_CD
Post 33 - FETCH_CONTENTS_4BL_CD
Post 34 - HMACSHA_COMPUTE_4BL_CD
Post 35 - RC4_INITIALIZE_4BL_CD
Post 36 - RC4_DECRYPT_4BL_CD
Post 37 - SHA_COMPUTE_4BL_CD
Post 3A - BRANCH
Post 40 - Entrypoint of CD reached
Post 42 - FETCH_HEADER
Post 44 - FETCH_CONTENTS
Post 45 - HMACSHA_COMPUTE
Post 46 - RC4_INITIALIZE
Post 47 - RC4_DECRYPT
Post 48 - SHA_COMPUTE
Post 4B - LZX_EXPAND
Post 4E - FETCH_OFFSET_6BL_CF
Post 4F - VERIFY_OFFSET_6BL_CF
Post 50 - LOAD_UPDATE_1
Post 52 - BRANCH
Post 58 - INIT_HYPERVISOR
Post 5A - INIT_XEX_TRAINING
Post 61 - INIT_HAL_PHASE_0
Post 63 - INIT_KERNEL_DEBUGGER
Post 64 - INIT_MEMORY_MANAGER
Post 65 - INIT_STACKS
Post 66 - INIT_OBJECT_SYSTEM
Post 67 - INIT_PHASE1_THREAD
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS
Post 69 - INIT_KEY_VAULT
Post 6A - INIT_HAL_PHASE_1
Post 6B - INIT_SFC_DRIVER
Post 6C - INIT_SECURITY
Post 6D - INIT_KEY_EX_VAULT
Post 6E - INIT_SETTINGS
Post 6F - INIT_POWER_MODE
Post 70 - INIT_VIDEO_DRIVER
Post 71 - INIT_AUDIO_DRIVER
Post 73 - INIT_SATA_DRIVER
Post 75 - INIT_DUMP_SYSTEM
Post 79 - LOAD_XAM
Shutdown
Power Up
Waiting for POST to change
Post 79 - LOAD_XAM
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 30 - VERIFY_OFFSET_4BL_CD
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post 22 - INIT_SECENG
Post 2F - RELOCATE
Post 2E - HWINIT
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post 22 - INIT_SECENG
Post 2F - RELOCATE
Post 2E - HWINIT
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 30 - VERIFY_OFFSET_4BL_CD
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 70 - INIT_VIDEO_DRIVER
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post 22 - INIT_SECENG
Post 2F - RELOCATE
Post 2E - HWINIT
Post 31 - FETCH_HEADER_4BL_CD
Post 33 - FETCH_CONTENTS_4BL_CD
Post 34 - HMACSHA_COMPUTE_4BL_CD
Post 35 - RC4_INITIALIZE_4BL_CD
Post 36 - RC4_DECRYPT_4BL_CD
Post 37 - SHA_COMPUTE_4BL_CD
Post 3A - BRANCH
Post 40 - Entrypoint of CD reached
Post 44 - FETCH_CONTENTS
Post 45 - HMACSHA_COMPUTE
Post 46 - RC4_INITIALIZE
Post 47 - RC4_DECRYPT
Post 48 - SHA_COMPUTE
Post 4B - LZX_EXPAND
Post 4E - FETCH_OFFSET_6BL_CF
Post 4F - VERIFY_OFFSET_6BL_CF
Post 50 - LOAD_UPDATE_1
Post 52 - BRANCH
Post 58 - INIT_HYPERVISOR
Post 59 - INIT_SOC_MMIO
Post 5A - INIT_XEX_TRAINING
Post 60 - INIT_KERNEL
Post 61 - INIT_HAL_PHASE_0
Post 63 - INIT_KERNEL_DEBUGGER
Post 64 - INIT_MEMORY_MANAGER
Post 65 - INIT_STACKS
Post 66 - INIT_OBJECT_SYSTEM
Post 67 - INIT_PHASE1_THREAD
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS
Post 69 - INIT_KEY_VAULT
Post 6A - INIT_HAL_PHASE_1
Post 6B - INIT_SFC_DRIVER
Post 6C - INIT_SECURITY
Post 6D - INIT_KEY_EX_VAULT
Post 6E - INIT_SETTINGS
Post 6F - INIT_POWER_MODE
Post 70 - INIT_VIDEO_DRIVER
Post 71 - INIT_AUDIO_DRIVER
Post 73 - INIT_SATA_DRIVER
Post 79 - LOAD_XAM
Most Fails(cumulative): 0x20
Shutdown

Power Up
Click to expand...

Image of R-JTAG board:
20131009_165701.jpg

Images of close-up soldering to motherboard:
20131009_165828.jpg20131009_165855.jpg20131009_165912.jpg20131009_165927.jpg


Description of problem:
All Seems to be ok but when i power on the console, this stop glitching but i get one Red Light... Xell never shows up. I try with and without audclamp. Always selecting the right boxes on J-Runner R-JTAG and Aud_Clamp when i use the aud clamp, and only R-JTAG when i don't use Audclamp

Changing the bridge on the QSB for aud_clamp when is necesary. But nothing always red light

EDIT: If i write the original nand again the XBOX works perfect!


I appreciate any help.
 
Last edited:
Martin C

Martin C

VIP Member
Jan 10, 2004
35,981
0
Scotland, UK
www.team-xecuter.com
"XeLL file created Successfully falcon_hack_aud_clamp.bin"

If you're writing AUD_CLAMP xell, you need to wire it up for AUD_CLAMP. You clearly haven't.
 
V

ViggoM

Full Member
Jul 12, 2011
36
0
If you read all the post you can see this i don't know if i write well, my english is very poor
Always selecting the right boxes on J-Runner R-JTAG and Aud_Clamp when i use the aud clamp, and only R-JTAG when i don't use Audclamp
Click to expand...
When i choose Aud_Clamp, i solder the wire from the pad to this point
fucsa8.jpg
And i bridge the points 3-1

When i took the pictures i remove the aud_clamp, and write again the Xell without Aud_Clamp to try if the aud_clamp give me the error.

this is when i use Aud Clamp and bridge 3-1
R-Jtag SelectedAud_Clamp Selected
Patching Jasper version 2.3 SMC at offset 0x12BA
XeLL file created Successfully falcon_hack_aud_clamp.bin
Click to expand...
And this when i don't use Aud_Clamp and bridge 1-2
R-Jtag SelectedPatching Jasper version 2.3 SMC at offset 0x12BA
XeLL file created Successfully falcon.bin
Click to expand...
 
A

AllyNerd

VIP Member
Feb 25, 2013
1,179
0
Philadelphia
What do you mean u get 1 red light? Ur saying your rjtag board has a red light? Or your rol has a red light
 
A

AllyNerd

VIP Member
Feb 25, 2013
1,179
0
Philadelphia
Ok. Thats e79. How about u leave it as aud_clamp and write the correct xell to it. I cant tell which dips u have on in the pic. Which ones are on?
 
Martin C

Martin C

VIP Member
Jan 10, 2004
35,981
0
Scotland, UK
www.team-xecuter.com
Check resistance between J2D2.1 and GND, also J2D2.2 and GND.

They should be 1.5k each.

Solder for AUD_CLAMP and write the aud_clamp xell to your console. Reset the console by removing the PSU for at least 20 seconds.

Take a new picture of AUD_CLAMP soldering.
 
V

ViggoM

Full Member
Jul 12, 2011
36
0
AllyNerd said:
Ok. Thats e79. How about u leave it as aud_clamp and write the correct xell to it. I cant tell which dips u have on in the pic. Which ones are on?
Click to expand...
DIPS 4 and 7 ON - And with Aud_Clamp the best results are with 1.2v bridge. And without Aud_Clamp 4 and 7 but without any bridge in the voltage selector.

Martin C said:
Check resistance between J2D2.1 and GND, also J2D2.2 and GND.

They should be 1.5k each.

Solder for AUD_CLAMP and write the aud_clamp xell to your console. Reset the console by removing the PSU for at least 20 seconds.

Take a new picture of AUD_CLAMP soldering.
Click to expand...
Thanks here is what you ask for. I discover other thing. When i use Aud_Clamp and when i don't bridge the 1.2v selector, i get other error 3RL with code 0010 and the post output shows different values, some times give me the 1RL and but the most times 3RL.

the resistance in the 2 points are 1.5k

J2D2.1
20131010_102221.jpg

J2D2.2
20131010_102230.jpg

QSB With Aud_Clamp Bridge
20131010_102601.jpg

Aud_Clamp Soldier
20131010_102617.jpg

JRunner's Log
Code: 
Initializing nanddump1.bin..Falcon/Opus
Jtag Selected
Nand Initialization Finished
Aud_Clamp Selected
R-Jtag Selected
Patching Jasper version 2.3 SMC at offset 0x12BA
XeLL file created Successfully falcon_hack_aud_clamp.bin
Version: 03
Flash Config: 0x01198010
Writing Nand
falcon_hack_aud_clamp.bin
Done!
in 0:09 min:sec
Rater's Log POST Output with 1.2v Bridge
Code: 
Phat Selected
Version: 10
Power Up
Waiting for POST to change
Post A0 - Panic - VERIFY_SECOTP_6 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post E0 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Post 70 - INIT_VIDEO_DRIVER 
Post 71 - INIT_AUDIO_DRIVER 
Post 73 - INIT_SATA_DRIVER 
Post 75 - INIT_DUMP_SYSTEM 
Post 79 - LOAD_XAM 
Most Fails(cumulative): 0xA0
Shutdown
Power Up
Waiting for POST to change
Post 04 
Post 44 - FETCH_CONTENTS 
Post 64 - INIT_MEMORY_MANAGER 
Post E4 
Post F4 
Post C4 - LZX_EXPAND_4 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 43 - VERIFY_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Post 70 - INIT_VIDEO_DRIVER 
Post 71 - INIT_AUDIO_DRIVER 
Post 73 - INIT_SATA_DRIVER 
Post 75 - INIT_DUMP_SYSTEM 
Post 79 - LOAD_XAM 
Most Fails(cumulative): 0xA0
Shutdown

Rater's Log POST Output Voltage bridges all open
Code: 
Phat SelectedVersion: 10
Power Up
Waiting for POST to change
Post F7 
Post E7 
Post 67 - INIT_PHASE1_THREAD 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 61 - INIT_HAL_PHASE_0 
Post 41 - VERIFY_OFFSET 
Post 01 
Post 04 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 04 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 04 
Post 24 - VERIFY_OFFSET_3BL_CC 
Post 04 
Post 24 - VERIFY_OFFSET_3BL_CC 
Post 04 
Post 24 - VERIFY_OFFSET_3BL_CC 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 41 - VERIFY_OFFSET 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Post 70 - INIT_VIDEO_DRIVER 
Post 71 - INIT_AUDIO_DRIVER 
Post 73 - INIT_SATA_DRIVER 
Post 75 - INIT_DUMP_SYSTEM 
Post 77 - INIT_OTHER_DRIVERS 
Post 79 - LOAD_XAM 
Shutdown
Power Up
Waiting for POST to change
Post 04 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 04 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 04 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 04 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 04 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 04 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 04 
Post 24 - VERIFY_OFFSET_3BL_CC 
Post 04 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 04 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 04 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 04 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Most Fails(cumulative): 0x20
Most Fails(cumulative): 0xA0
Shutdown
If you need any mor info please ask for it.

thanks very much
 
V

ViggoM

Full Member
Jul 12, 2011
36
0
Made it.

POST with Voltage selector all open
Code: 
Post 52 - BRANCH Post 58 - INIT_HYPERVISOR 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Post 70 - INIT_VIDEO_DRIVER 
Post 71 - INIT_AUDIO_DRIVER 
Post 73 - INIT_SATA_DRIVER 
Post 75 - INIT_DUMP_SYSTEM 
Post 77 - INIT_OTHER_DRIVERS 
Post 78 - INIT_STFS_DRIVER 
Post 79 - LOAD_XAM 
Shutdown
Power Up
Waiting for POST to change
Post 04 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 04 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 04 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 04 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 04 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 04 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 04 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 04 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 04 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 04 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Post 70 - INIT_VIDEO_DRIVER 
Post 71 - INIT_AUDIO_DRIVER 
Post 73 - INIT_SATA_DRIVER 
Post 75 - INIT_DUMP_SYSTEM 
Post 77 - INIT_OTHER_DRIVERS 
Post 79 - LOAD_XAM 
Shutdown
And with 1.2v
Code: 
Phat Selected
Version: 10
Power Up
Waiting for POST to change
Post F7 
Post E7 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 61 - INIT_HAL_PHASE_0 
Post 41 - VERIFY_OFFSET 
Post 01 
Post 80 
Post C0 
Post 80 
Post 40 - Entrypoint of CD reached 
Post C0 
Post C2 - LZX_EXPAND_2 
Post C0 
Post 80 
Post 40 - Entrypoint of CD reached 
Post C0 
Post E0 
Post E2 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Post 70 - INIT_VIDEO_DRIVER 
Post 71 - INIT_AUDIO_DRIVER 
Post 73 - INIT_SATA_DRIVER 
Post 75 - INIT_DUMP_SYSTEM 
Post 77 - INIT_OTHER_DRIVERS 
Post 78 - INIT_STFS_DRIVER 
Post 79 - LOAD_XAM 
Shutdown
Power Up
Waiting for POST to change
Post 04 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 04 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 04 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 04 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 04 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 04 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 04 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 04 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 04 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 04 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Post 70 - INIT_VIDEO_DRIVER 
Post 71 - INIT_AUDIO_DRIVER 
Post 73 - INIT_SATA_DRIVER 
Post 75 - INIT_DUMP_SYSTEM 
Post 77 - INIT_OTHER_DRIVERS 
Post 79 - LOAD_XAM 
Shutdown
Resetting................
Phat Selected
Version: 10
Power Up
Waiting for POST to change
Post 79 - LOAD_XAM 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 80 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post E0 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 10 - Payload/1BL started 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post DC 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Post 70 - INIT_VIDEO_DRIVER 
Post 71 - INIT_AUDIO_DRIVER 
Post 73 - INIT_SATA_DRIVER 
Post 76 - INIT_SYSTEM_ROOT 
Post 77 - INIT_OTHER_DRIVERS 
Post 78 - INIT_STFS_DRIVER 
Post 79 - LOAD_XAM 
Most Fails(cumulative): 0x21
Shutdown
Power Up
Waiting for POST to change
Post 04 
Post 44 - FETCH_CONTENTS 
Post E4 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post DC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 20 - CB entry point reached 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 40 - Entrypoint of CD reached 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post CC 
Post FC 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Post 70 - INIT_VIDEO_DRIVER 
Post 71 - INIT_AUDIO_DRIVER 
Post 73 - INIT_SATA_DRIVER 
Post 75 - INIT_DUMP_SYSTEM 
Post 77 - INIT_OTHER_DRIVERS 
Post 78 - INIT_STFS_DRIVER 
Post 79 - LOAD_XAM 
Most Fails(cumulative): 0x21
Shutdown
 
Martin C

Martin C

VIP Member
Jan 10, 2004
35,981
0
Scotland, UK
www.team-xecuter.com
so no change, meaning I'm 100% sure the issue is with your JTAG wiring.

Set JTAG switches to ON and 0.

Check with your multimeter:

1. There should be continuity between J2D2.4 and J2D2.7.
2. There should be continuity between J2D2.1 and the near-side of the Diode under the words 'JTAG Alt'
3. There should be continuity between J2D2.2 and the near-side of the Diode to the LEFT of 'JTAG'.
4. There should be NO continuity between J2D2.2 and J2D2.4
 
V

ViggoM

Full Member
Jul 12, 2011
36
0
20131010_114152.jpg
jtag switch ON - No jumper and with the switch on the left. i had this

J2D2.4 J2D2.7 - Continuty OK
J2D2.1 and Diode under JTAG on the Right pin - Continuity OK
J2D2.2 and diode on the left of JTAG on the Right Pin - NO Continuty
J2D2.2 and J2D2.4 - NO Continuity.

With the Right Switch puting on the middle i don't have continuity between J2D2.4 and J2D2.7
 
Last edited:
Martin C

Martin C

VIP Member
Jan 10, 2004
35,981
0
Scotland, UK
www.team-xecuter.com
"J2D2.2 and diode on the left of JTAG on the Right Pin - NO Continuty"

That could be your problem.

JTAG_checks.jpg

The paired colours should be where you're checking continuity with the [ON/OFF] switch set to ON and the [OFF/330-470/0] switch set to 0.

You shouldn't have ANY continuity between different colours.

When set to 330-470, you will either have 330ohm or 470 ohms between J2D2.4 and J2D2.7, depending on the jumper selection.
 
V

ViggoM

Full Member
Jul 12, 2011
36
0
I Think i found the problem, the On - Off Switch is broken

I check this with a new QSB and when you put in ON al is ok.... But in the one that is installed i don't have Continuity between this points.
20131010_115310.jpg

I Go to put a bridge on it and tell you how is going.
 
Last edited:
V

ViggoM

Full Member
Jul 12, 2011
36
0
WORKS!!! Thanks Very Much Martin C

Cycles to Glitch
1, 2, 1, 1

Have a good day!!!

PS: How can i tag the thread like Fixed? because i try editing the Title but not work haha.
 
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