R-JTAG Falcon won't boot

[tigres13]

Console Type: Falcon
NAND size: 16
Dashboard version: 16537
CB version: not sure - can check
Screenshot of NAND details from J-Runner:

POST output from J-Runner (either POST_OUT monitor or RATER output):

[ CODE]
No internet connection found (RasInstalled), so can't check integrity of files. Use at your own risk
===================================================
Monday, November 04, 2013 7:52:21 PM
 
J-Runner v0.3 Beta (2) Started
 
 
WARNING! - Your selected working directory already contains files!
You can view these files by using 'Show Working Folder' Button
 
Initializing nanddump1.bin..
Falcon/Opus
Jtag Selected
Nand Initialization Finished
Aud_Clamp Selected
R-Jtag Selected
Patching Jasper version 2.3 SMC at offset 0x12BA
XeLL file created Successfully falcon_hack_aud_clamp.bin
Version: 10
Flash Config: 0x01198010
Writing Nand
falcon_hack_aud_clamp.bin
Done!
in 0:18 min:sec

J-Runner log:

[ CODE]
No internet connection found (RasInstalled), so can't check integrity of files. Use at your own risk
===================================================
Monday, November 04, 2013 7:52:21 PM
 
J-Runner v0.3 Beta (2) Started
 
 
WARNING! - Your selected working directory already contains files!
You can view these files by using 'Show Working Folder' Button
 
Initializing nanddump1.bin..
Falcon/Opus
Jtag Selected
Nand Initialization Finished
Aud_Clamp Selected
R-Jtag Selected
Patching Jasper version 2.3 SMC at offset 0x12BA
XeLL file created Successfully falcon_hack_aud_clamp.bin
Version: 10
Flash Config: 0x01198010
Writing Nand
falcon_hack_aud_clamp.bin
Done!
in 0:18 min:sec
[ /CODE]
POST output from J-Runner (either POST_OUT monitor or RATER output):
[ CODE]
Phat Selected
Version: 00
Wrong Version.
Phat Selected
Version: 10
Power Up
Waiting for POST to change
Post 20 - CB entry point reached 
Post 10 - Payload/1BL started 
Post 10 - Payload/1BL started 
Post 10 - Payload/1BL started 
Post 10 - Payload/1BL started 
Post 10 - Payload/1BL started 
Post 10 - Payload/1BL started 
Post 10 - Payload/1BL started 
Post 10 - Payload/1BL started 
Post 10 - Payload/1BL started 
Post 10 - Payload/1BL started 
Post 10 - Payload/1BL started 
Post 19 - HMACSHA_COMPUTE 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1C - SHA_COMPUTE 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 70 - INIT_VIDEO_DRIVER 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 10 - Payload/1BL started 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1C - SHA_COMPUTE 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 60 - INIT_KERNEL 
Post 15 - FETCH_OFFSET 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 19 - HMACSHA_COMPUTE 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1C - SHA_COMPUTE 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 70 - INIT_VIDEO_DRIVER 
Post 10 - Payload/1BL started 
Post 15 - FETCH_OFFSET 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 19 - HMACSHA_COMPUTE 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1C - SHA_COMPUTE 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 70 - INIT_VIDEO_DRIVER 
Post 20 - CB entry point reached 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 15 - FETCH_OFFSET 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 19 - HMACSHA_COMPUTE 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1C - SHA_COMPUTE 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 15 - FETCH_OFFSET 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 19 - HMACSHA_COMPUTE 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1C - SHA_COMPUTE 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 70 - INIT_VIDEO_DRIVER 
Post 70 - INIT_VIDEO_DRIVER 
Most Fails(cumulative): 0x21
Shutdown
Initializing falcon_hack_aud_clamp.bin..
Header is wrong..
Falcon/Opus
Jtag Selected
Nand Initialization Finished
Initializing nanddump1.bin..
Falcon/Opus
Nand Initialization Finished
Aud_Clamp Selected
R-Jtag Selected

Image of R-JTAG board:

Images of close-up soldering to motherboard:

Description of problem:
First off I have a little previous experience with soldering and so I was confident in giving this a try. It has been soldered and desoldered twice so it's not the prettiest. I can't get Xell to load to get my key. I have it set to 470, Aud_Clamp on, default voltage and Dip 7 on. When set to Dip 7 + 1 though 6, with the chip flashing green, they all gave me the same 0x21 code and then eventually gives 3 red rings with error code 0010. When set to 330 there is no green light on the chip and it won't glitch. The system has never had any issues before.

Was the console working before you started: Yes

 

[chase]

your soldering doesn't look all that great.. might want to clean it up.. I can see several spots that needs to be re-done

if you have soldered to stby_clk, it is not needed and make sure it is not damaged .. also on the jtag qsb, you don't need to solder to the R2P12 resistor with aud_clamp.. resistor can be damaged very easily ..

0x21 means you have to continue tuning.. use caps and then possibly try voltage settings .. may also want to try top cpu_rst point.. follow the R-JTAG guide.. all the info is in there

 

[BrockThunderjam]

Your dips aren't right. 7-8 On Off for falcon. You say it's on, but it's not in the pic. Try all voltages and all combinations. Also, you really should be linked up to the net so JRunner downloads the latest updates.

 

[tigres13]

@chase - I touched up a couple of spots of soldering but which ones are you referring to? Since I had previously soldered to stby_clk and R2P12, how would I check to make sure that they are not damadged? Also what do you mean by "use caps"?

@BrockThunderjam - Dip 7 is on and Dip 8 is off in the picture, it must have been the angle that it was taken at because I went back to the board to look for myself. This is being done on an old ass computer that is used solely for flashing so it isn't connected to the internet at all times. The first time I started the program it was connected to the internet and did do updates.

So I tried the other settings of different voltages of default/1.2v/1.8v, setting the jumper to 470 or 330 and the multitude of combinations of Dips. The only thing that comes up with glitches at all is 470, Aud_Clamp on, default voltage and Dip 7 on. Most number of glitches (3) happened with Dip 7+4 and Dip 7+5. Here is the log from that. It gets to 3 glitches and then red rings.

Phat Selected
Version: 00
Wrong Version.
Phat Selected
Version: 10
Power Up
Waiting for POST to change
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 19 - HMACSHA_COMPUTE 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1C - SHA_COMPUTE 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 19 - HMACSHA_COMPUTE 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1C - SHA_COMPUTE 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 10 - Payload/1BL started 
Post 15 - FETCH_OFFSET 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 19 - HMACSHA_COMPUTE 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1C - SHA_COMPUTE 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 10 - Payload/1BL started 
Post 15 - FETCH_OFFSET 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 19 - HMACSHA_COMPUTE 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1C - SHA_COMPUTE 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1C - SHA_COMPUTE 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 15 - FETCH_OFFSET 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 19 - HMACSHA_COMPUTE 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1C - SHA_COMPUTE 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 30 - VERIFY_OFFSET_4BL_CD 
Most Fails(cumulative): 0x21
Shutdown

How do I know when I have tuned it sufficiently? When I see Xell on my TV to see my key? I don't see this happening if I keep getting red rings.

 

[tigres13]

I flashed back to stock NAND, turned off JTAG and desoldered 5v to see if the system would boot at all and it does. Now there are horizontal lines rolling through the screen on when the A/V cable is set to HDTV and large vertical blocks rolling through the screen on when it is set to TV. Why is this happening and how can it be corrected?

 

[Martin C]

It sounds like your GPU needs a reflow/reball.

 

[tigres13]

@Martin This system is practically brand new with very little play time on it. It also worked perfectly fine prior to installing the kit. I don't know what would have happened between then and now.

 

[Martin C]

@Martin This system is practically brand new with very little play time on it. It also worked perfectly fine prior to installing the kit. I don't know what would have happened between then and now.

MS stopped making Falcon consoles back in 2008. It's by no means brand new. Where did you buy it from?

 

[tigres13]

@Martin From an older gentleman who bought it for his son who didn't play with it. It had a really old dash and only three games under the profile. I have no reason not to believe what the gentleman said.

 

[Martin C]

I'm not suggesting that anyone is lying to you. If you've removed the R-JTAG board completely and are getting this issue, it's far more likely to be a GPU problem.

 

[tigres13]

So after touching up a couple of points and then going to bed, I tried again now and there aren't any lines on the screen when hooked up to HDMI or Component cables how weird. I still can't get Xell to load though. Any suggestions?

 

[chase]

you have to rear the guide from start to finish and make sure you understand it.. it tells you all about tuning, where to start, when to use caps and when to adjust voltage settings.. continue tuning and make sure to try the top cpu_rst point but just be carefull with it and use flux

 

[Martin C]

Your POST_OUT still looks wrong. Check all points soldered and make sure they're all good.

 

[chase]

the last point (closest to -clamp) on the post qsb doesn't look like a good connection.. use flux and touch it up

 

[tigres13]

I have been reading and following the guide found here http://team-xecuter.com/forums/showthread.php?t=135779 and the picture shows that the alt CPU_RST point is one side of R8C2. On another team-xecuter thread (http://team-xecuter.com/forums/showthread.php?t=85115&p=580451#post580451) the OP is directed to this picture http://team-xecuter.com/forums/attachment.php?attachmentid=7826&d=1334086485 that says the alt CPU_RST point is actually a through point located below R8C2. Which one is it? I want to try the alternate point to see if I get better results like you all have suggested but I want to make sure it goes to the right point.

 

[Martin C]

POST_OUT is the problem, not CPU_RST.

 

[chase]

the alternate cpu_rst is the one which is posted in the official guide (R8C2).. J8C1.2 is used in case u damage the R8C2 resistor..

for now, concentrate on post_out like ↑ said

 

[tigres13]

In my adventures of soldering and desoldering this setup I managed to fork the FT6U8 and FT6U2 spots on the post qsb. So now there isn't any metal on the qsb so I cannot get solder to stick to it. I bought a CircuitWriter pen to try and complete the circuit with that but I am not sure if that is helping or hurting. I tried to use the CircuitWriter to add metal to the qsb so I could solder it to the point on the board but it evaporates as soon as heat is applied. Here are some updated pictures after touching up the soldering and cleaning it up a bit. Is there any salvaging these two spots?

 

[chase]

is the pad on the post qsb damaged or on the 360 mobo ? from your picture, it looks like the board is also damaged.. a pro can solder to whats remaining on the board.. I wouldn't advise you to try.

if only the qsb is damaged, you can solder some 30awg wire from mobo to the lower post pads.



in reality, the qsb is suppose to be soldered right the first time with ample amount of flux used. when you're constantly touching up the points and most likely not using any or enough flux, you run into problems like you've got.

in all honesty, send it to a pro to finish the job.. you'll have piece of mind knowing you're not gonna damage the 360 any further

 

[tigres13]

I desoldered the POST_QSB and cleaned everything up to get a better look at the bottom of the QSB and the mainboard. Here is a picture of what I found. There is a solder ball on the FT6U7 spot on the mainboard so between that and the camera flash is why it looks discolored. I can get solder to stick to all points except for FT6U8 and FT6U2. I took off the CPU heatsink to look at the traces on the opposite side of those points and everything looks like it hasn't been touched. Is there an alternate route that I can put these points to? I found this thread (http://team-xecuter.com/forums/showthread.php?t=74992) and thought that maybe I could do something similar to his suggestion for a my situation.