COOLRUNNER Help getting a Coolrunner v3 to glitch with a Rev C

[oblivioncth]

Help getting a Corona v3 to glitch with a Rev C

Hey guys, so this is my first time doing a Corona V3 and I am having a hard time getting it to glitch. Unfortunately back when I ordered the parts the Slim Proto V2 wasn't shipping yet and the V1 was outta stock everywhere so I just got a Rev C to CR3 kit that came with the CR Rev C, the Corona QSB with the crystal, and the CPU_RST Cleaner.

TX Product(s) used: Coolrunner Rev C, POSTfix adapter, NAND-X, Corona QSB, CPU_RST Cleaner
Console Type: Corona V3
NAND size: 16MB
Dashboard version: 2.0.16197
CB version: 13182
Screenshot of NAND details from J-Runner:

J-Runner log (everything i've done with this console so far):
http://pastebin.com/UYM6efH0

updflash.bin log (if applicable):N/A

Image of Coolrunner:


Images of close-up soldering to motherboard:



^GND on CR, I don't like using the AV port




Description of problem:
See Bellow

Was the console working before you started: Y

Do you get a green debug light appear on the RGH chip every 4-5 seconds: Y

How long is the light on for each time: On for about 2 secs, off for about 5

So far I have tried:

• No CPU_RST cleaner
• CPU_RST cleaner on 1K and 470pf
• JP closed and open
• 1 and 2 closed
• Switch on Phat and Slim
• C on 70 on the Postfix adapter
• 0-2 timing file, 1-2, 1-3, 2-2
• Blue CPU_RST line
• The longest I have let it go is for about 6-7 minutes.

Now I know there is a lot more I can try but I am on a time crunch to get this done within the next few hours (preferably as fast as possible), so I just wanted to know the following:

1) I had fears that the Postfix adapter wasn't sitting properly. Since the debug light is going can I assume that means it is on there properly?
2) Tips from people more experienced with Coronas. Is it better to use the shielded CPU_RST line on Coronas? I had always used the blue wire on Trinitys because I got crappy results with the shielded wire. Any timing files that seem to work a lot of the time? Is 2 and 3 closed usually a better bet? JP closed or open? Etc. C/yellow line length on the POSTfix adapter? CPU_RST lengths?

I feel bad practically leeching but like I said I have never done a Corona before, am unfortunately using a Rev C, and want to get this done as fast as possible. If it is truly 100% trial and error I while go through every combo I can, but I was just hoping someone could give me a tip or two to speed the process up.

Thank you.

 

[scott1503]

Any pictures ?

 

[Martin C]

Moved to the noob section. We have a template for you to complete - please do so.

 

[oblivioncth]

Ok I will update the OP.

 

[oblivioncth]

The OP has been updated with pictures and the required information.

 

[Martin C]

how long is CPU_RST? Make it no longer than 10cm. Does the console boot stock ok still? Keep POST_OUT to the '5' point for now.

Also try bypassing CPU_RST cleaner. Also try setting the CR to phat.

Finally try all timing files for 60 seconds minimum.

 

[oblivioncth]

Thanks Martin Ill try all of this and get back to you. The CPU_RST line is currently the full 50cm so ill cut it down. The console does boot stock.

 

[unkn0wn.92]

Thanks Martin Ill try all of this and get back to you. The CPU_RST line is currently the full 50cm so ill cut it down. The console does boot stock.

50cm on corona's is too long try 14cm cpu_rst ,10cm post_out bridge 2-3 ,JP switch to slim and 1:3 timing file

 

[Martin C]

Yep - that would have been your problem!

 

[oblivioncth]

OK so I moved the POSTfix adapter point to "5", shortened the CPU_RST line to a tad under 10CM, and am currently bypassing the CPU_RST cleaner. I tried every timing file on phat and slim for about 2min each and still no glitch.

 

[scott1503]

You may want to look at the qsb connections as soon of them look like they are not connected properly

 

[Martin C]

no need for 2 mins. 60 seconds.

Once you've gone through them all, try POST on 50. Then go again.

 

[oblivioncth]

no need for 2 mins. 60 seconds.

Once you've gone through them all, try POST on 50. Then go again.

Will do. I can write and read the NAND so those points are obviously fine and I used a multimeter to check that E and F were connected.

 

[unkn0wn.92]

From the OP pics i can't see if the R2C6 & R2C7 are soldered
OP please double check them and report back

 

[oblivioncth]

Yes I have those bridged, and i made sure so by continuity testing the one end of each bridge with E&F respectively. Additionally I used a multimeter to check all of the QSB points and double checked that the console stills boots stock. Im gonna try the other post length.

 

[oblivioncth]

OK so I tried every file again on phat and slim with C at 50. I doubled checked all the connections on the QSB with a multimeter, the resistor points that needed to be bridged, and checked for a 2nd time that the console still boots stock fine.

I guess I can keep moving the POST point up to higher values. Anything else?

I feel like theres something wrong since I can't get it to glitch at all but the only thing I can think of is that something is wrong with the POSTfix adapter or the CPU_RST line is bad (i.e. length or interference). You would know better than I would though lol. I am using the alt point FT3T10 but I can't imagine that makes any difference.

 

[Martin C]

Have you posted new images of your install since making changes?

 

[oblivioncth]

No but the only thing that is different is that the C line is moved to 50 and CPU_RST is shorter. Ill post pics if you want me to, but one sec I left the thing on for like 10min with the 0-2 timing file and C at 70 and when i just looked its on Xell. Ima reboot it and record how long it takes. First ima get the CPU key lol.

 

[Martin C]

when xell boots you'll know as the RoL cycles.

 

[oblivioncth]

Really? Is that new? Before I swear it would just come up and the ROL never did anything. So far its been 3 minutes with no glitch. Even if the times are horrible I just want to see if they are consistent so I know i am heading in the right direction of improving them. I guess Ill flash the glitch image over once Xell boots again and then work on improving the times. Ill post pictures anyway but like I said its just D shortened and C moved.