JTAG Jasper 16mb R-JTAG Xell Booting problems HELP!

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Taijigamer2

VIP Member
Jun 8, 2013
1,292
0
England
You need to start your own thread. Firstly, what Team Xecuter product is this relating to. R-jtag, Rgh etc. Go to the relevant sub forum, scroll to the bottom of the list of threads, there will be a link to start own thread. In the Rjtag, Rgh forums there is a template sticky, cut and paste that when describing your issue and we will be able to help you. :)
 
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Reactions: dreamwaqas30

Pokeastuff

Full Member
Sep 30, 2013
71
0
Well at least the console still works :-/ Was playing on it normally yesterday. I'll play around with it and try to get it working. Thank you everyone for your help!!!!
 

dreamwaqas30

Junior Member
Oct 18, 2013
21
0
pokeastaff tell me how its work now what happend next can you upload some pics of working xbox 360 i just wana know what happend next
 

Pokeastuff

Full Member
Sep 30, 2013
71
0
Sorry dreamwaqas30 I don't understand your question.

Also, got the console to glitch after one boot again but the fourth red ring still resides :( I even took off the Aud_Clamp and set it to a normal R-JTAG. Still same problem. To be truthful, I haven't really touch the JTAG QSB on the underside of the board that much. I really don't think I've lifted any of the pads. I've gotten the fourth red ring ever since i've started this too......... it's just more often now. I can send a picture of it if anyone wants?

Edit: This is the POST at the moment with the Aud_clamp not activated.

Code:
Phat Selected
Version: 10
Power Up
Waiting for POST to change
Post 06 
Post 1E - BRANCH 
Post 06 
Post 16 - FETCH_HEADER 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 16 - FETCH_HEADER 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 0E 
Post 06 
Post 16 - FETCH_HEADER 
Post 06 
Post 1E - BRANCH 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post CE 
Post 76 - INIT_SYSTEM_ROOT 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post 12 - FSB_CONFIG_RX_STATE 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 41 - VERIFY_OFFSET 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 77 - INIT_OTHER_DRIVERS 
Post 79 - LOAD_XAM 
Shutdown
Power Up
Waiting for POST to change
Post 06 
Post 1E - BRANCH 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 1E - BRANCH 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 6C - INIT_SECURITY 
Post 6F - INIT_POWER_MODE 
Post 79 - LOAD_XAM 
Shutdown
Power Up
Waiting for POST to change
Post 06 
Post 1E - BRANCH 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 1E - BRANCH 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post FC 
Post FE 
Post FE 
Post FE 
Post FE 
Post FE 
Post FE 
Post 82 - Panic - DATA_STORAGE 
Post FE 
Post FE 
Post 80 
Post FE 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post FE 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 76 - INIT_SYSTEM_ROOT 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 15 - FETCH_OFFSET 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post FE 
Post FE 
Post FE 
Post FE 
Post FE 
Post FE 
Post FE 
Post FE 
Post FE 
Post FE 
Post FE 
Post FE 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 08 
Post FC 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post 12 - FSB_CONFIG_RX_STATE 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post 86 - Panic - EXTERNAL 
Post 06 
Post 26 - FETCH_HEADER_3BL_CC 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 86 - Panic - EXTERNAL 
Post 06 
Post 26 - FETCH_HEADER_3BL_CC 
Post 06 
Post FE 
Post 06 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 08 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post FC 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post 10 - Payload/1BL started 
Post 12 - FSB_CONFIG_RX_STATE 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6C - INIT_SECURITY 
Post 6F - INIT_POWER_MODE 
Post 79 - LOAD_XAM 
Most Fails(cumulative): 0x22
Shutdown
Power Up
Waiting for POST to change
Post 06 
Post 0E 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 0E 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 1E - BRANCH 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post F8 
Post FE 
Post FE 
Post FE 
Post FA 
Post FE 
Post FE 
Post FE 
Post FE 
Post FE 
Post FE 
Post FE 
Post FE 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6C - INIT_SECURITY 
Post 70 - INIT_VIDEO_DRIVER 
Post 79 - LOAD_XAM 
Most Fails(cumulative): 0x22
Shutdown
Power Up
Waiting for POST to change
Post 06 
Post 16 - FETCH_HEADER 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 16 - FETCH_HEADER 
Post 06 
Post 16 - FETCH_HEADER 
Post 06 
Post 16 - FETCH_HEADER 
Post 06 
Post 16 - FETCH_HEADER 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 16 - FETCH_HEADER 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 0E 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post FC 
Post 0A 
Post FE 
Post 8E - Panic - VPU_UNAVAILABLE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post FA 
Post FE 
Post 0A 
Post FE 
Post CE 
Post 0A 
Post 3A - BRANCH 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post 12 - FSB_CONFIG_RX_STATE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 08 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post CE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post FC 
Post FE 
Post FE 
Post FE 
Post FE 
Post FE 
Post FE 
Post FE 
Post FE 
Post 22 - INIT_SECENG 
Post FE 
Post FE 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post FC 
Post FC 
Post FE 
Post FE 
Post FC 
Post FE 
Post FE 
Post FE 
Post 86 - Panic - EXTERNAL 
Post FE 
Post FE 
Post 82 - Panic - DATA_STORAGE 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post FE 
Post FE 
Post FE 
Post FA 
Post FE 
Post FA 
Post FE 
Post FE 
Post FE 
Post FA 
Post FE 
Post FA 
Post FE 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6C - INIT_SECURITY 
Post 6F - INIT_POWER_MODE 
Post 79 - LOAD_XAM 
Most Fails(cumulative): 0x22
Shutdown
Power Up
Waiting for POST to change
Post 06 
Post 0E 
Post 06 
Post 16 - FETCH_HEADER 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 16 - FETCH_HEADER 
Post 06 
Post 16 - FETCH_HEADER 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 16 - FETCH_HEADER 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 0E 
Post 06 
Post 1E - BRANCH 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post FE 
Post FE 
Post FE 
Post FE 
Post FE 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post FC 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post 7E 
Post FE 
Post 06 
Post 7E 
Post 06 
Post FE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post FC 
Post 0A 
Post FE 
Post 0A 
Post 8A - Panic - DECREMENTER 
Post FA 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 3A - BRANCH 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 15 - FETCH_OFFSET 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 26 - FETCH_HEADER_3BL_CC 
Post FE 
Post 06 
Post 8E - Panic - VPU_UNAVAILABLE 
Post FE 
Post 06 
Post FE 
Post 8E - Panic - VPU_UNAVAILABLE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post FE 
Post FE 
Post FE 
Post FE 
Post 32 - VERIFY_HEADER_4BL_CD 
Post FE 
Post FE 
Post FE 
Post FE 
Post FE 
Post FE 
Post FE 
Post FE 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 8E - Panic - VPU_UNAVAILABLE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 0A 
Post FE 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 26 - FETCH_HEADER_3BL_CC 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6C - INIT_SECURITY 
Post 6F - INIT_POWER_MODE 
Post 79 - LOAD_XAM 
Most Fails(cumulative): 0x22
Shutdown
Power Up
Waiting for POST to change
Post 06 
Post 1E - BRANCH 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 16 - FETCH_HEADER 
Post 06 
Post 1E - BRANCH 
Post 06 
Post 16 - FETCH_HEADER 
Post 06 
Post 0E 
Post 06 
Post 0E 
Post 06 
Post 0E 
Post 06 
Post 1E - BRANCH 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post 86 - Panic - EXTERNAL 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 6C - INIT_SECURITY 
Post 6F - INIT_POWER_MODE 
Post 79 - LOAD_XAM 
Most Fails(cumulative): 0x22
Shutdown
Resetting................
 
Last edited:

Taijigamer2

VIP Member
Jun 8, 2013
1,292
0
England
Be that as it may, your jtag qsb may still be at fault. What is the secondary code for the red ring ie 1033? Also, your successful glitches are still not consistent which means your Rjtag wiring still needs work. Are u using flux to reflow the points? And make sure u are reflashing the correct nand.bin for AUDclamp or no AUDclamp. If all else fails u could always remove the jtag qsb altogether and use the original 2 diode wiring method, just to rule out faulty qsb/soldering.
 
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Pokeastuff

Full Member
Sep 30, 2013
71
0
Is it alright if you can send me a tutorial on how to perform the 2 diode method?? I've tried everything else.....
 

Taijigamer2

VIP Member
Jun 8, 2013
1,292
0
England
Just search jtag diode wiring. There are plenty of sites and pictures showing where to solder. U will need 2 switching diodes and a jumper wire. Also remember to use standard jasper_hack.bin not aud_clamp.bin. Good luck.
 

Pokeastuff

Full Member
Sep 30, 2013
71
0
Doesn't your console have to be under a certain dashboard for this mod to work?? Because they've patched the CPU in earlier updates so this wouldn't work??
 

Martin C

VIP Member
Jan 10, 2004
35,981
0
Scotland, UK
www.team-xecuter.com
Doesn't your console have to be under a certain dashboard for this mod to work?? Because they've patched the CPU in earlier updates so this wouldn't work??
The R-JTAG uses JTAG loaders, which are able to load due to the R-JTAG chip. The JTAG wiring is needed to complete the boot process.
 

Pokeastuff

Full Member
Sep 30, 2013
71
0
I soldered those points again "that ezzda1 circled". They were lifted. I just used something to push them down while i soldered again. Didn't help though. I'm getting the same fourth red ring error. Is there another way I could solder them to make a stronger bond to the board? Like scratching off some of the QSB to get to the copper underneath?

Edit: could I have the same problem as this guy? http://team-xecuter.com/forums/showthread.php?t=140017 ??
 
Last edited:

Taijigamer2

VIP Member
Jun 8, 2013
1,292
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England
Like i said before, remove the qsb altogether, tidy up the area with copper braid and isopropyl alcohol. then try the old wire method, if it works then its probably your qsb install. if u still get the red ring then u probably have an issue with the points on the mobo. youll need to check resistance values. Martin C wrote a comprehensive checklist on another thread but i forget which one, sorry.
 

Pokeastuff

Full Member
Sep 30, 2013
71
0
Alright so I got Xell to boot :) and I flashed the XeBuild to the console and I'm getting this error now. "3 red ring"

Code:
Phat Selected
Version: 10
Power Up
Waiting for POST to change
Post 04 
Post 04 
Post 86 - Panic - EXTERNAL 
Post 9E - Panic - Panic - VERIFY_SECOTP_4 
Post 86 - Panic - EXTERNAL 
Post 9E - Panic - Panic - VERIFY_SECOTP_4 
Post 86 - Panic - EXTERNAL 
Post 9E - Panic - Panic - VERIFY_SECOTP_4 
Post 86 - Panic - EXTERNAL 
Post 9E - Panic - Panic - VERIFY_SECOTP_4 
Post 86 - Panic - EXTERNAL 
Post 9E - Panic - Panic - VERIFY_SECOTP_4 
Post 86 - Panic - EXTERNAL 
Post 96 - Panic - SIG_VERIFY 
Post 86 - Panic - EXTERNAL 
Post 9E - Panic - Panic - VERIFY_SECOTP_4 
Post 86 - Panic - EXTERNAL 
Post 9E - Panic - Panic - VERIFY_SECOTP_4 
Post 86 - Panic - EXTERNAL 
Post 9E - Panic - Panic - VERIFY_SECOTP_4 
Post 86 - Panic - EXTERNAL 
Post 9E - Panic - Panic - VERIFY_SECOTP_4 
Post 86 - Panic - EXTERNAL 
Post 9E - Panic - Panic - VERIFY_SECOTP_4 
Post FC 
Post F8 
Post 88 - Panic - PROGRAM 
Post F8 
Post 88 - Panic - PROGRAM 
Post F8 
Post 80 
Post 88 - Panic - PROGRAM 
Post FC 
Post 80 
Post 80 
Post 80 
Post FC 
Post F8 
Post 80 
Post F8 
Post 80 
Post 88 - Panic - PROGRAM 
Post 80 
Post 80 
Post F8 
Post 80 
Post F8 
Post FE 
Post 80 
Post FC 
Post 80 
Post 88 - Panic - PROGRAM 
Post 80 
Post FC 
Post 88 - Panic - PROGRAM 
Post FC 
Post 88 - Panic - PROGRAM 
Post FE 
Post 80 
Post FE 
Post 80 
Post FE 
Post 80 
Post 80 
Post FC 
Post 80 
Post 80 
Post FE 
Post FC 
Post F8 
Post 80 
Post 88 - Panic - PROGRAM 
Post 80 
Post C8 - SHA_VERIFY 
Shutdown
 

Taijigamer2

VIP Member
Jun 8, 2013
1,292
0
England
Ok, great. What did you change to succeed with xell? Can you post your j-runner log for your nand build. What is the secondary error code?
 

Pokeastuff

Full Member
Sep 30, 2013
71
0
It's actually really stupid... after Martin told me about rubbing off some of the green protective layer on the Xbox circet board it got me thinking if I messed anything up on the JTAG QSB. Turns out I completely cut off one point. Got a wire and soldered the point to the copper line. Then it booted!.

Code:
===================================================
October-20-13 8:59:19 PM


J-Runner v0.3 Beta (2) Started




WARNING! - Your selected working directory already contains files!
You can view these files by using 'Show Working Folder' Button




Checking Files
Finished Checking Files
Initializing nanddump1.bin..
Jasper 16MB
Jtag Selected
Nand Initialization Finished
R-Jtag Selected
Aud_Clamp Selected
Load Files Initiliazation Finished
Clean SMC detected
Patching Jasper version 2.3 SMC at offset 0x12BA
16537
Started Creation of the 16537 xebuild image
KV Info saved to file
---------------------------------------------------------------
     xeBuild v1.09.639
---------------------------------------------------------------
base path changed to M:\Torrent Downloads\Xbox Stuff\JRunner Stuff\J-Runner\xeBuild
---- { Image Build Mode } ----
building jtag image




******* WARNING: could not patch SMC reset limit!


---------------------------------------------------------------
M:\Downloads\J-Runner\419782495205\updflash.bin image built, info:
---------------------------------------------------------------
Kernel    : 2.0.16537.0
Console   : Jasper
NAND size : 16MiB
Build     : JTAG
Xell      : power on console with console eject button
Serial    : 419782495205
ConsoleId : 032949846690
MoboSerial: 705985D227909525
Mfg Date  : 12/25/2009
CPU Key   : 494E4755FF09BD71ACB9209D51183FA2
1BL Key   : DD88AD0C9ED669E7B56794FB68563EFA
DVD Key   : BB63BEB6BC5CA54A14A15D21F8FC31FD
CF LDV    : 15
KV type   : type2 (hashed - unchecked, master key not available)
---------------------------------------------------------------
    xeBuild Finished. Have a nice day.
---------------------------------------------------------------
Saved to M:\Downloads\J-Runner\419782495205
Image is Ready
Version: 10
Flash Config: 0x00023010
Writing Nand
updflash.bin
Done!
in 3:38 min:sec
Sorry, how do you find the secondary error code??
 

Pokeastuff

Full Member
Sep 30, 2013
71
0
I changed the Voltage settings on the Mod Chip to the default. The red ring happens instantly with the same error "3 red ring" secondary error 0010
 
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