R-JTAG JASPER CAN'T GO PAST XBOX LOGO

[chronixx]

Kernel : 2.0.16747.0
Console : Jasper
NAND size : 16MiB

i got the cpu_key and created image but when i wrote it on the console, the machine started behaving
funny and this has happened to me with all r-jtag chip i bought this time around.
the console fail to power up with their normal power switch, instead you have to give time or pull and push back
the power switch for them to power up the console, it also fails to show the ring leds even the centre one is not displaying.
i have posted pics in other threads i have created with almost similar issues and i have not got one my/our seniors telling me that
i have poor installation or bad soldering. i have also failed to boot into xell with the jtag qsb but instead i got the key of this console
(jasper in this thread) using resistors/ manual install i grabbed the and installed the jtag qsb back.
i'm sorry if the problem is with me but i'm eager to find out what causes the console not to power, and once it starts doing that,
you also get problems with stock. i have read a similar issue in someone's thread and i hope its easy to fix.
please i'm calling for help if any of the expert can help here.

---------------------------------------------------------------
Kernel : 2.0.16747.0
Console : Jasper
NAND size : 16MiB
Build : JTAG
Xell : power on console with console eject button
Serial : 317772192805
ConsoleId : 019582582976
MoboSerial: 792105C207109285
Mfg Date : 07/09/2009
CPU Key : E24356C6F5772C4DEA7484006F8B6C8F
1BL Key : DD88AD0C9ED669E7B56794FB68563EFA
DVD Key : 2F42D59DD2CFF6B1B412F7D9E5F2A068
CF LDV : 7
KV type : type2 (hashed - unchecked, master key not available)
---------------------------------------------------------------
xeBuild Finished. Have a nice day.
---------------------------------------------------------------
Saved to F:\X\J-Runner v03 (1) Core Pack\J-Runner\317772192805
Image is Ready
Initializing updflash.bin..
Jasper 16MB
Nand Initialization Finished
Version: 10
Flash Config: 0x00023010
Writing Nand
updflash.bin
Done!
in 3:36 min:sec

there is also change in color but with AV only HDMI its clear but with AV color fades, its not pure.





Device not found
Phat Selected
Version: 10
Power Up
Waiting for POST to change
Post 07
Post C7 - LZX_EXPAND_7
Post 87 - Panic - ALIGNMENT
Post 97 - Panic - NONHOST_RESUME_STATUS
Post F7
Post C7 - LZX_EXPAND_7
Post F7
Post C7 - LZX_EXPAND_7
Post E7
Post F7
Post C7 - LZX_EXPAND_7
Post F7
Post C7 - LZX_EXPAND_7
Post E7
Post F7
Post C7 - LZX_EXPAND_7
Post F7
Post C7 - LZX_EXPAND_7
Post E7
Post F7
Post C7 - LZX_EXPAND_7
Post F7
Post C7 - LZX_EXPAND_7
Post E7
Post C7 - LZX_EXPAND_7
Post 10 - Payload/1BL started
Post 15 - FETCH_OFFSET
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post F0 - Panic - VERIFY_OFFSET_CB_B
Post F0 - Panic - VERIFY_OFFSET_CB_B
Post 40 - Entrypoint of CD reached
Post F8
Post 40 - Entrypoint of CD reached
Post FC
Post 40 - Entrypoint of CD reached
Post F8
Post 40 - Entrypoint of CD reached
Post F8
Post 40 - Entrypoint of CD reached
Post FC
Post 40 - Entrypoint of CD reached
Post F8
Post 40 - Entrypoint of CD reached
Post FC
Post 40 - Entrypoint of CD reached
Post F8
Post 40 - Entrypoint of CD reached
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post F8
Post 40 - Entrypoint of CD reached
Post F8
Post 40 - Entrypoint of CD reached
Post F8
Post 40 - Entrypoint of CD reached
Post F8
Post F8
Post 40 - Entrypoint of CD reached
Post F8
Post F0 - Panic - VERIFY_OFFSET_CB_B
Post F8
Post 40 - Entrypoint of CD reached
Post F8
Post 40 - Entrypoint of CD reached
Post F8
Post FC
Post 15 - FETCH_OFFSET
Post 18 - FETCH_CONTENTS
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 40 - Entrypoint of CD reached
Post F8
Post 40 - Entrypoint of CD reached
Post F8
Post F0 - Panic - VERIFY_OFFSET_CB_B
Post 40 - Entrypoint of CD reached
Post F8
Post 40 - Entrypoint of CD reached
Post F8
Post 40 - Entrypoint of CD reached
Post F0 - Panic - VERIFY_OFFSET_CB_B
Post 40 - Entrypoint of CD reached
Post F8
Post 40 - Entrypoint of CD reached
Post F8
Post 40 - Entrypoint of CD reached
Post F8
Post 12 - FSB_CONFIG_RX_STATE
Post 15 - FETCH_OFFSET
Post 18 - FETCH_CONTENTS
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post F8
Post 70 - INIT_VIDEO_DRIVER
Post 40 - Entrypoint of CD reached
Post F8
Post 40 - Entrypoint of CD reached
Post F8
Post 40 - Entrypoint of CD reached
Post F8
Post 40 - Entrypoint of CD reached
Post F8
Post F8
Post 40 - Entrypoint of CD reached
Post FC
Post 40 - Entrypoint of CD reached
Post F8
Post 40 - Entrypoint of CD reached
Post F0 - Panic - VERIFY_OFFSET_CB_B
Post F8
Post 12 - FSB_CONFIG_RX_STATE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 40 - Entrypoint of CD reached
Post F8
Post 40 - Entrypoint of CD reached
Post F8
Post FD
Post F8
Post 40 - Entrypoint of CD reached
Post F8
Post FC
Post 40 - Entrypoint of CD reached
Post F8
Post 40 - Entrypoint of CD reached
Post F8
Post 70 - INIT_VIDEO_DRIVER
Post 40 - Entrypoint of CD reached
Post F8
Post 40 - Entrypoint of CD reached
Post F8
Post 40 - Entrypoint of CD reached
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 40 - Entrypoint of CD reached
Post F8
Post 40 - Entrypoint of CD reached
Post FC
Post F8
Post 40 - Entrypoint of CD reached
Post 70 - INIT_VIDEO_DRIVER
Post F8
Post 40 - Entrypoint of CD reached
Post F8
Post 40 - Entrypoint of CD reached
Post F8
Post 40 - Entrypoint of CD reached
Post F8
Post FE
Post 40 - Entrypoint of CD reached
Post F8
Post 40 - Entrypoint of CD reached
Post F8
Post 40 - Entrypoint of CD reached
Post 18 - FETCH_CONTENTS
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post F8
Post C0
Post F8
Post C0
Post F8
Post C0
Post F8
Post F0 - Panic - VERIFY_OFFSET_CB_B
Post C0
Post F0 - Panic - VERIFY_OFFSET_CB_B
Post E0
Post C0
Post F8
Post C0
Post F0 - Panic - VERIFY_OFFSET_CB_B
Post C0
Post F8
Post C0
Post F8
Post C0
Post F8
Post C0
Post F0 - Panic - VERIFY_OFFSET_CB_B
Post C0
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 15 - FETCH_OFFSET
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 60 - INIT_KERNEL
Post F8
Post C0
Post F0 - Panic - VERIFY_OFFSET_CB_B
Post C0
Post E0
Post FC
Post C0
Post F0 - Panic - VERIFY_OFFSET_CB_B
Post C0
Post E0
Post F8
Post C0
Post F0 - Panic - VERIFY_OFFSET_CB_B
Post F8
Post C0
Post F8
Post C0
Post F0 - Panic - VERIFY_OFFSET_CB_B
Post C0
Post F8
Post 80
Post F8
Post C0
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 15 - FETCH_OFFSET
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 40 - Entrypoint of CD reached
Post F0 - Panic - VERIFY_OFFSET_CB_B
Post 40 - Entrypoint of CD reached
Post F8
Post 40 - Entrypoint of CD reached
Post F0 - Panic - VERIFY_OFFSET_CB_B
Post 60 - INIT_KERNEL
Post F8
Post 40 - Entrypoint of CD reached
Post F8
Post 40 - Entrypoint of CD reached
Post F0 - Panic - VERIFY_OFFSET_CB_B
Post 40 - Entrypoint of CD reached
Post F8
Post 40 - Entrypoint of CD reached
Post F0 - Panic - VERIFY_OFFSET_CB_B
Post 40 - Entrypoint of CD reached
Post FC
Post 40 - Entrypoint of CD reached
Post 10 - Payload/1BL started
Post 18 - FETCH_CONTENTS
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 80
Post F8
Post C0
Post F0 - Panic - VERIFY_OFFSET_CB_B
Post F8
Post C0
Post FC
Post C0
Post E0
Post F8
Post C0
Post F8
Post C0
Post E0
Post F8
Post C0
Post F8
Post C0
Post F8
Post F0 - Panic - VERIFY_OFFSET_CB_B
Post C0
Post F8
Post C0
Post E0
Post 10 - Payload/1BL started
Post 12 - FSB_CONFIG_RX_STATE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post 22 - INIT_SECENG
Post 2F - RELOCATE
Post 2E - HWINIT
Post 31 - FETCH_HEADER_4BL_CD
Post 33 - FETCH_CONTENTS_4BL_CD
Post 34 - HMACSHA_COMPUTE_4BL_CD
Post 35 - RC4_INITIALIZE_4BL_CD
Post 36 - RC4_DECRYPT_4BL_CD
Post 37 - SHA_COMPUTE_4BL_CD
Post 3A - BRANCH
Post 40 - Entrypoint of CD reached
Post 42 - FETCH_HEADER
Post 44 - FETCH_CONTENTS
Post 45 - HMACSHA_COMPUTE
Post 46 - RC4_INITIALIZE
Post 47 - RC4_DECRYPT
Post 48 - SHA_COMPUTE
Post 4B - LZX_EXPAND
Post 4E - FETCH_OFFSET_6BL_CF
Post 4F - VERIFY_OFFSET_6BL_CF
Post 51 - LOAD_UPDATE_2
Post 50 - LOAD_UPDATE_1
Post 52 - BRANCH
Post 58 - INIT_HYPERVISOR
Post 59 - INIT_SOC_MMIO
Post 5A - INIT_XEX_TRAINING
Post 60 - INIT_KERNEL
Post 61 - INIT_HAL_PHASE_0
Post 62 - INIT_PROCESS_OBJECTS
Post 64 - INIT_MEMORY_MANAGER
Post 65 - INIT_STACKS
Post 66 - INIT_OBJECT_SYSTEM
Post 67 - INIT_PHASE1_THREAD
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS
Post 69 - INIT_KEY_VAULT
Post 6A - INIT_HAL_PHASE_1
Post 6B - INIT_SFC_DRIVER
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post 22 - INIT_SECENG
Post 2F - RELOCATE
Post 23 - INIT_SYSRAM
Post 44 - FETCH_CONTENTS
Post 45 - HMACSHA_COMPUTE
Post 46 - RC4_INITIALIZE
Post 48 - SHA_COMPUTE
Post 4B - LZX_EXPAND
Post 4D - DECODE_FUSES
Post 51 - LOAD_UPDATE_2
Post 52 - BRANCH
Post 59 - INIT_SOC_MMIO
Post 5A - INIT_XEX_TRAINING
Post 5B - INIT_KEYRING
Post 5C - INIT_KEYS
Post 5E - INIT_SOC_INT_COMPLETE
Post 5F
Post 60 - INIT_KERNEL
Post 61 - INIT_HAL_PHASE_0
Post 69 - INIT_KEY_VAULT
Post 6C - INIT_SECURITY
Post 6D - INIT_KEY_EX_VAULT
Post 6F - INIT_POWER_MODE
Post 70 - INIT_VIDEO_DRIVER
Post 72 - INIT_BOOT_ANIMATION + XMADecoder & XAudioRender Init
Post 77 - INIT_OTHER_DRIVERS
Post 78 - INIT_STFS_DRIVER
Most Fails(cumulative): 0xA0
Shutdown

 

[Oggy]

 

[Utmad]

I have now lost count of how many consoles you have shagged up.

 

[nofeloniesyet]

I have now lost count of how many consoles you have shagged up.

lol,that many eh?

 

[Oggy]

Still nowhere near you.

 

[jsinger47]

Your JTAG wiring is at fault.

 

[Utmad]

Still nowhere near you.

cheeky sod

 

[Taijigamer2]

cheeky sod

Lol.

 

[chronixx]

I have now lost count of how many consoles you have shagged up.

i read this and i laugh at some point you had a one star like me or you started with one console after a long time of experience you're
now at that point, even when you're at your peak you can't contribute like you should...i laughed when i read the first three posts that you replied
to this thread. i have posted images in those posts you saw and its clear for you to identify my mistakes and collect where i went wrong.
i was advised to create threads of each console and its now what i'm doing, stating problems of each console, the zephyr i asked and posted images
i'm sure Martin C is busy maybe testing with the new chips coming out soon(maybe) but how noob you may shagg like you said, he will always say something
to give you a go.
i'm a noob but if a few don't reply to your post the likes of BL4K3Y, MARTIN C, and others you're unlikely to solve the issue please correct if i'm wrong here
i'll never forget the help i have got from Martin C, he and other few are always fighting for us the noob and at some point we'll be at your level, i'll be at that level and will help many.

 

[chronixx]

http://feed1.tinypic.com/rss.php?u=vdCAfstZR2D6zKuGHgoq1g==

i have all my jtag qsb images and i hope i can deal with this issue of power on and off
most consoles i have worked on with this package of r-jtag i just got a few days back, are all having the same issue,
i think the problem is with the jtag qsb part but i'm not sure if its me or the qsb.
but i have more than 4 consoles with this problem and i have checked the soldering 100 times i think its not that
bad, please check on the images and advise me, since they're six points to solder i have applied enough flux but all the same.
2 consoles with the cpu_key have the same problems, one freezes at x box log and can't power on normally with both stock and hacked image
if its the soldering, i'll change it. but i really need help here

 

[Oggy]

Ive had dodgy jtag qsbs recently, i didnt need martin or blakey to tell me either.

 

[chronixx]

Ive had dodgy jtag qsbs recently, i didnt need martin or blakey to tell me either.

Oggy don't get me bad i mentioned a few guys that have given help to many, i have read many threads were you help many
and i like your help. even the first post in this thread was helping me because i have posted the link with pics. i replied to the one who
thought that asking for help in my situation is something to laugh about instead mentioning what could help me.
i have a post of zephyr were i have provided all and wanted his experience there, i still need his help and everybody's
to become better also in my install.
if i have dodgy jtag qsb tell me how i can deal with this because i think the qsb is well soldered to the board.

 

[morinzo]

http://feed1.tinypic.com/rss.php?u=vdCAfstZR2D6zKuGHgoq1g==

i have all my jtag qsb images and i hope i can deal with this issue of power on and off
most consoles i have worked on with this package of r-jtag i just got a few days back, are all having the same issue,
i think the problem is with the jtag qsb part but i'm not sure if its me or the qsb.
but i have more than 4 consoles with this problem and i have checked the soldering 100 times i think its not that
bad, please check on the images and advise me, since they're six points to solder i have applied enough flux but all the same.
2 consoles with the cpu_key have the same problems, one freezes at x box log and can't power on normally with both stock and hacked image
if its the soldering, i'll change it. but i really need help here

think your link is bad, not opening for me..

 

[[AD]]

Its your soldering thats the problem. Use flux and tidy up all your qsb points.

The Jtag qsb looks like theres no solder on some points.

Also instead of posting a link to tinypics, spend a little time and post images in the thread for easy access by us to check your problems out..

i.e

 

[jsinger47]

The reason people are poking fun at you is that you don't seem to be learning from your mistakes.

 

[gavin_darkglide]

the ROL board issue is the jtag qsb, you probably burned the tiny resistor, as for the not getting past the boot logo, try changing power mode settings in smc_config, this sounds like the falcon rgh2 issues.

 

[chronixx]

the ROL board issue is the jtag qsb, you probably burned the tiny resistor, as for the not getting past the boot logo, try changing power mode settings in smc_config, this sounds like the falcon rgh2 issues.

thanks you guys i'll get better.
i change the power mode settings to what?
power mode is 8280 and
power vcs is 8665
to what values should i put them on?

 

[[AD]]

Re do all the QSB solder points and test it again before you start messing with SMC....

You will f**k it up more before you sort it that way.

 

[Sasuke Uchiha]

Get some good flux. I personally use kingbo which is great and last forever

 

[chronixx]

fixed....thank you to all. i have learned something.