Console Type: Jasper
Programmer Used: JRP v2.0
NAND Size: 16
Dashboard version: It was 2.0.16202.0 originally
CB Version: 6754
Screenshot of NAND details from J-Runner:
J-Runner log
I had originally been able to get this console to go to post 25. No idea why it's stopping at 19 now.
Image of the CR4 XL
Ignore the mangled cables, I mistook this cable for the NAND cable. I've since put electrical tape around the joins.
Images of close-up soldering to motherboard:
Detailed Description of the Problem
Okay, so here's the story so far. I wanted to mod my Japanese Jasper 360. I bought a CR4XL and JRP and a QSB kit in the hopes of keeping everything simple and easy. Well, the "kit" turned out to be just one QSB, so I've had to manually solder all the other wires.
I've also had issues with pads getting lifted, in order;
Point B - Soldered wire successfully, pad was lifted when I was jiggling the wire around trying to route it to the CR4XL.
CPU Reset - Soldered the shielded cable but the pad popped right off when I was taping the wire into place due to the thickness of the wire.
Alternate CPU reset point - Couldn't get solder to bond to the correct point. Knowledgeable friend informs me you can remove the resister and solder the wire to the big point nearby. Noticed pad was missing after removing the resister.
I've be able to repair all these broken pads though.
Anyway, after soldering in the NAND, I did the "read NAND" (5 times), "create XELL" (with latest dash, "JTAG", "AUD_CLAMP" and "R-JTAG" settings) then "write XELL" process. J-Runner said everything was fine, so I soldered the CR4XL into place. Next step should be hook up the 360 to get CPU key and so on, but when I turned it on, well, it WOULDN'T turn on. The broken pad at B was the cause, fixed this, and now it boots. Black screen though an no green light on the CR4XL. Noticed the jumper on the CR4XL was around the wrong way, fixed this and now I get the usual "green light blinks every 5 seconds" thing. Still a blank screen. And that's where I'm at now.
Was the console working before you started: Yes
Do you get a green debug light appear on the CR4 XL chip every 4-5 seconds: Yes
How long is the light on for each time: Uh, about a second.
Programmer Used: JRP v2.0
NAND Size: 16
Dashboard version: It was 2.0.16202.0 originally
CB Version: 6754
Screenshot of NAND details from J-Runner:
J-Runner log
Code:
Slim SelectedVersion: 10
Power Up
Waiting for POST to change
Post 01
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 03
Post 04
Post 05
Post 01
Post 01
Post 03
Post 05
Post 06
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 0D
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 0B
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 0B
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Shutdown
Phat Selected
Version: 10
Power Up
Waiting for POST to change
Post 01
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 0A
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 0B
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 0D
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 0B
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 0B
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 0B
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 0D
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 0B
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 0B
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 0B
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 0B
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 09
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 01
Post 0D
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 0B
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 09
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 0B
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 01
Post 09
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 09
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 0B
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 0B
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 0B
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 0B
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 0B
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 0B
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 0B
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 0B
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 0B
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 0B
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 0B
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 0B
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 0B
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 0B
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 0B
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 0D
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 0B
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Post 04
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 01
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 01
Shutdown
Image of the CR4 XL
Ignore the mangled cables, I mistook this cable for the NAND cable. I've since put electrical tape around the joins.
Images of close-up soldering to motherboard:
Detailed Description of the Problem
Okay, so here's the story so far. I wanted to mod my Japanese Jasper 360. I bought a CR4XL and JRP and a QSB kit in the hopes of keeping everything simple and easy. Well, the "kit" turned out to be just one QSB, so I've had to manually solder all the other wires.
I've also had issues with pads getting lifted, in order;
Point B - Soldered wire successfully, pad was lifted when I was jiggling the wire around trying to route it to the CR4XL.
CPU Reset - Soldered the shielded cable but the pad popped right off when I was taping the wire into place due to the thickness of the wire.
Alternate CPU reset point - Couldn't get solder to bond to the correct point. Knowledgeable friend informs me you can remove the resister and solder the wire to the big point nearby. Noticed pad was missing after removing the resister.
I've be able to repair all these broken pads though.
Anyway, after soldering in the NAND, I did the "read NAND" (5 times), "create XELL" (with latest dash, "JTAG", "AUD_CLAMP" and "R-JTAG" settings) then "write XELL" process. J-Runner said everything was fine, so I soldered the CR4XL into place. Next step should be hook up the 360 to get CPU key and so on, but when I turned it on, well, it WOULDN'T turn on. The broken pad at B was the cause, fixed this, and now it boots. Black screen though an no green light on the CR4XL. Noticed the jumper on the CR4XL was around the wrong way, fixed this and now I get the usual "green light blinks every 5 seconds" thing. Still a blank screen. And that's where I'm at now.
Was the console working before you started: Yes
Do you get a green debug light appear on the CR4 XL chip every 4-5 seconds: Yes
How long is the light on for each time: Uh, about a second.
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