ANSWERED Jasper Getting 0010 Before it Even Glitches

A

alexk403

I have Jasper 256mb I installed R-JTAG and JTAG qsb with aud clamp. Successfully booted into xell, then tried to start tweaking to get optimal boot times and it will glitch and then what I think happens is once it successfully glitches and tries to boot I get 0010. Then when I start it up again after changing the dips it doesnt even try to boot just goes straight to 0010. Which made me assume that this was not because of the dip settings since it didn't even try to boot. Is this an incorrect assumption? Because of this I have not tried every single dip combination. Is it still worth trying if I am getting 0010 before it turns on? My soldering looks pretty good and I have been checking every point with a multimeter for continuity and have found no shorts. Thanks in advance any help is appreciated.

Console Type: Jasper
NAND size: 256
Dashboard version: 16203
Was the console working before you started: Yes
IMG_0254.jpgIMG_0257.jpgIMG_0252.jpgIMG_0253.jpgIMG_0255.jpgIMG_0256.jpg

The post out points in the middle are not joined, I have checked them for continuity. And the little resistor that you solder to on the jtag qsb is connected. I know you can't see it from the angle of the picture. Thanks.
 
Last edited by a moderator:
A

alexk403

I do not have a rater log because I have not used rater or the J-r programmer. I can hook it up if its absolutely necessary but I figured I would try and get the console at least booting first (not worrying about optimal boot times yet). Can I test that it still works with stock nand without unsoldering anything? Or what would I have to do to its current state? Maybe turn the switch for the jtag qsb to off and then what should I do with the R-JTAG or will stock still work with it installed, maybe just unsolder the power. Thanks again any help is appreciated.
 
Taijigamer2

Taijigamer2

VIP Member
Jun 8, 2013
1,292
0
England
You've just answered your own question. Flash stock, switch off jtag qsb and desolder 5v r-jtag power. A nice little method from Team Xecuter me thinks. Respect.
 
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A

alexk403

Before I go back to stock nand, here is rater for 2 boots

Version: 10Power Up
Waiting for POST to change
Post 80
Post DF
Post 80
Post DF
Post DF
Post 97 - Panic - NONHOST_RESUME_STATUS
Post FE
Post F6
Post F0 - Panic - VERIFY_OFFSET_CB_B
Post D0 - CB_A entry point reached
Post 90 - Panic - VMX_ASSIST
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post 22 - INIT_SECENG
Post 2F - RELOCATE
Post 2E - HWINIT
Post 31 - FETCH_HEADER_4BL_CD
Post 33 - FETCH_CONTENTS_4BL_CD
Post 34 - HMACSHA_COMPUTE_4BL_CD
Post 35 - RC4_INITIALIZE_4BL_CD
Post 36 - RC4_DECRYPT_4BL_CD
Post 37 - SHA_COMPUTE_4BL_CD
Post 3A - BRANCH
Post 40 - Entrypoint of CD reached
Post 42 - FETCH_HEADER
Post 44 - FETCH_CONTENTS
Post 45 - HMACSHA_COMPUTE
Post 47 - RC4_DECRYPT
Post 48 - SHA_COMPUTE
Post 4B - LZX_EXPAND
Post 4E - FETCH_OFFSET_6BL_CF
Post 4F - VERIFY_OFFSET_6BL_CF
Post 51 - LOAD_UPDATE_2
Post 50 - LOAD_UPDATE_1
Post 52 - BRANCH
Post 58 - INIT_HYPERVISOR
Post 5A - INIT_XEX_TRAINING
Post 61 - INIT_HAL_PHASE_0
Post 63 - INIT_KERNEL_DEBUGGER
Post 64 - INIT_MEMORY_MANAGER
Post 65 - INIT_STACKS
Post 66 - INIT_OBJECT_SYSTEM
Post 67 - INIT_PHASE1_THREAD
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS
Post 69 - INIT_KEY_VAULT
Post 6A - INIT_HAL_PHASE_1
Post 6B - INIT_SFC_DRIVER
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 19 - HMACSHA_COMPUTE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post 22 - INIT_SECENG
Post 2F - RELOCATE
Post 23 - INIT_SYSRAM
Post 31 - FETCH_HEADER_4BL_CD
Post 3B - PCI_INIT
Post 44 - FETCH_CONTENTS
Post 45 - HMACSHA_COMPUTE
Post 46 - RC4_INITIALIZE
Shutdown
Power Up
Waiting for POST to change
Post 96 - Panic - SIG_VERIFY
Post DF
Post 80
Post 97 - Panic - NONHOST_RESUME_STATUS
Post 80
Post DF
Post 94 - Panic - VERIFY_OFFSET
Post DF
Post 97 - Panic - NONHOST_RESUME_STATUS
Post DF
Post DF
Post 96 - Panic - SIG_VERIFY
Post DF
Post 80
Post 80
Post A0 - Panic - VERIFY_SECOTP_6
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post 22 - INIT_SECENG
Post 2F - RELOCATE
Post 2E - HWINIT
Post 31 - FETCH_HEADER_4BL_CD
Post 33 - FETCH_CONTENTS_4BL_CD
Post 34 - HMACSHA_COMPUTE_4BL_CD
Post 35 - RC4_INITIALIZE_4BL_CD
Post 36 - RC4_DECRYPT_4BL_CD
Post 37 - SHA_COMPUTE_4BL_CD
Post 3A - BRANCH
Post 40 - Entrypoint of CD reached
Post 42 - FETCH_HEADER
Post 44 - FETCH_CONTENTS
Post 45 - HMACSHA_COMPUTE
Post 46 - RC4_INITIALIZE
Post 47 - RC4_DECRYPT
Post 48 - SHA_COMPUTE
Post 4B - LZX_EXPAND
Post 4E - FETCH_OFFSET_6BL_CF
Post 4F - VERIFY_OFFSET_6BL_CF
Post 51 - LOAD_UPDATE_2
Post 50 - LOAD_UPDATE_1
Post 52 - BRANCH
Post 58 - INIT_HYPERVISOR
Post 5A - INIT_XEX_TRAINING
Post 60 - INIT_KERNEL
Post 61 - INIT_HAL_PHASE_0
Post 62 - INIT_PROCESS_OBJECTS
Post 63 - INIT_KERNEL_DEBUGGER
Post 64 - INIT_MEMORY_MANAGER
Post 65 - INIT_STACKS
Post 66 - INIT_OBJECT_SYSTEM
Post 67 - INIT_PHASE1_THREAD
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS
Post 69 - INIT_KEY_VAULT
Post 6A - INIT_HAL_PHASE_1
Post 6B - INIT_SFC_DRIVER
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post 22 - INIT_SECENG
Post 2F - RELOCATE
Post 23 - INIT_SYSRAM
Post 31 - FETCH_HEADER_4BL_CD
Post 33 - FETCH_CONTENTS_4BL_CD
Post 34 - HMACSHA_COMPUTE_4BL_CD
Post 44 - FETCH_CONTENTS
Post 45 - HMACSHA_COMPUTE
Post 46 - RC4_INITIALIZE
Post 4B - LZX_EXPAND
Post 4D - DECODE_FUSES
Post 4E - FETCH_OFFSET_6BL_CF
Post 51 - LOAD_UPDATE_2
Post 52 - BRANCH
Post 59 - INIT_SOC_MMIO
Post 5A - INIT_XEX_TRAINING
Post 5B - INIT_KEYRING
Post 5C - INIT_KEYS
Post 5F
Post 60 - INIT_KERNEL
Post 61 - INIT_HAL_PHASE_0
Post 62 - INIT_PROCESS_OBJECTS
Post 63 - INIT_KERNEL_DEBUGGER
Post 64 - INIT_MEMORY_MANAGER
Post 65 - INIT_STACKS
Post 66 - INIT_OBJECT_SYSTEM
Post 67 - INIT_PHASE1_THREAD
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS
Post 6A - INIT_HAL_PHASE_1
Shutdown
Stopped Mid-Nudge: Resetting................
Click to expand...
When it tried to turn it on the second time it didn't actually turn on, but kept trying the post points, so then I manually pressed the power button and then it continued. Also, I do not have the dvd drive plugged in which i know changes the pulses and whatever but idc right now. So When rater stops and the shutdown timer starts, meaning it successfully glitched, I do not get the lights going around in a circle, I do not know if that is because of no dvd drive or a problem, I think its a problem though, and that rater cannot correctly turn on my xbox the second time. Thanks.

UPDATE: wrote stock nand back to it and everything is working perfectly.
 
Last edited by a moderator:
A

alexk403

Alright after successfully booting to stock nand I wrote the updflash.bin back to it and it worked. Currently user rater on it. So for some reason I guess it needed a new nand write. Thanks everyone!
 
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