Jasper R-Jtag glitches but wont boot after bad dashlanch plugin

future_dj · Aug 27, 2013

Well after setting a plugin in dashlanch, my xbox will now not boot to dash. Ive reset back to stock and it booted fine, formated my onboard mu but after reflashing back to exploited nand, it still wont boot. Its a jasper 512 dips are on 8,7,2 (worked fine before) nothing has been changed, even flash the exact same nand that was working before but nothing.

I got some rater posts:

Code:

[CODE]Phat Selected
Version: 10
Power Up
Waiting for POST to change
Post 04 
Post 04 
Post F7 
Post F6 
Post F2 - Panic - SHA_VERIFY_CB_B 
Post C0 
Post 40 - Entrypoint of CD reached 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Shutdown
Resetting................
Phat Selected
Version: 10
Power Up
Waiting for POST to change
Post F7 
Post F6 
Post F2 - Panic - SHA_VERIFY_CB_B 
Post F0 - Panic - VERIFY_OFFSET_CB_B 
Post D0 - CB_A entry point reached 
Post C0 
Post 40 - Entrypoint of CD reached 
Shutdown

Screen:

Have no idea wtf has happened, was thinking its something to do with the lanch.ini file but ive formatted my nand? should i completely erase it with nandpro?

DreamZ · Aug 27, 2013

Take out any hdds or USB sticks. Does the console still boot anything atall?

future_dj · Aug 27, 2013

Better rater results:

Code:

[CODE]Phat Selected
Version: 10
Power Up
Waiting for POST to change
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Shutdown
Power Up
Waiting for POST to change
Post 28 - FETCH_CONTENTS_3BL_CC 
Post A8 - Panic - SIG_VERIFY_3BL_CC 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 12 - FSB_CONFIG_RX_STATE 
Post 15 - FETCH_OFFSET 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Shutdown
Power Up
Waiting for POST to change
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Shutdown
Power Up
Waiting for POST to change
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 0C 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 39 - SHA_VERIFY_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Most Fails(cumulative): 0xA0
Shutdown
Power Up
Waiting for POST to change
Post 1E - BRANCH 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Most Fails(cumulative): 0xA0
Shutdown
Power Up
Waiting for POST to change
Post 28 - FETCH_CONTENTS_3BL_CC 
Post A8 - Panic - SIG_VERIFY_3BL_CC 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post B8 - Panic - CF auth failed 
Post E0 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Most Fails(cumulative): 0xA0
Shutdown
Power Up
Waiting for POST to change
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post E0 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 49 - SHA_VERIFY 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Most Fails(cumulative): 0xA0
Shutdown
Power Up
Waiting for POST to change
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 49 - SHA_VERIFY 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Most Fails(cumulative): 0xA0
Shutdown
Power Up
Waiting for POST to change
Post 10 - Payload/1BL started 
Post 10 - Payload/1BL started 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 23 - INIT_SYSRAM 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 49 - SHA_VERIFY 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Most Fails(cumulative): 0xA0
Shutdown
Power Up
Waiting for POST to change
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Most Fails(cumulative): 0xA0
Shutdown
Power Up
Waiting for POST to change
Post 12 - FSB_CONFIG_RX_STATE 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 12 - FSB_CONFIG_RX_STATE 
Post 15 - FETCH_OFFSET 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Most Fails(cumulative): 0xA0
Shutdown
Power Up
Waiting for POST to change
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Most Fails(cumulative): 0xA0
Shutdown
Power Up
Waiting for POST to change
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Most Fails(cumulative): 0xA0
Shutdown
Power Up
Waiting for POST to change
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Most Fails(cumulative): 0xA0
Shutdown
Power Up
Waiting for POST to change
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Most Fails(cumulative): 0xA0
Shutdown
Resetting................

Screen:

future_dj · Aug 27, 2013

there are no usbs or hdds in (usually only a 3.5" hdd) and look at new rater, it boots (i think) but theres no picture and the rol doesnt do the startup shiz. it booted to stock just fine.

gavin_darkglide · Aug 27, 2013

If you are using fakeanim the rol wont blink, but should dump you at nxe dash. then again my rater always ends at INIT_XAM, which I beleive to be the final post code on a successful r-jtag.

future_dj · Aug 27, 2013

Well ive completely formatted my nand so there shouldnt be anything on it (fakeanim, plugins, dashlanch, etc) it should boot straight to a blank nxe. It was all working but now its not

future_dj · Aug 27, 2013

even better rater

Code:

Phat Selected
Version: 10
Power Up
Waiting for POST to change
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Shutdown
Power Up
Waiting for POST to change
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 06 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 06 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 0C 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 39 - SHA_VERIFY_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Most Fails(cumulative): 0xA0
Shutdown
Power Up
Waiting for POST to change
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Most Fails(cumulative): 0xA0
Shutdown
Power Up
Waiting for POST to change
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Most Fails(cumulative): 0xA0
Shutdown
Power Up
Waiting for POST to change
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Most Fails(cumulative): 0xA0
Shutdown
Power Up
Waiting for POST to change
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Most Fails(cumulative): 0xA0
Shutdown
Power Up
Waiting for POST to change
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Most Fails(cumulative): 0xA0
Shutdown
Power Up
Waiting for POST to change
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post E0 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Most Fails(cumulative): 0xA0
Shutdown
Power Up
Waiting for POST to change
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Most Fails(cumulative): 0xA0
Shutdown
Power Up
Waiting for POST to change
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Most Fails(cumulative): 0xA0
Shutdown

future_dj · Aug 27, 2013

continued:

Code:

Power Up
Waiting for POST to change
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Most Fails(cumulative): 0xA0
Shutdown
Power Up
Waiting for POST to change
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Most Fails(cumulative): 0xA0
Shutdown
Power Up
Waiting for POST to change
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Most Fails(cumulative): 0xA0
Shutdown
Power Up
Waiting for POST to change
Post 04 
Post 04 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post E0 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Most Fails(cumulative): 0xA0
Shutdown
Power Up
Waiting for POST to change
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 39 - SHA_VERIFY_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Most Fails(cumulative): 0xA0
Shutdown
Power Up
Waiting for POST to change
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Most Fails(cumulative): 0xA0
Shutdown
Power Up
Waiting for POST to change
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Most Fails(cumulative): 0xA0
Shutdown
Power Up
Waiting for POST to change
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 01 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post E0 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 01 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post E0 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 43 - VERIFY_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Most Fails(cumulative): 0xA0
Shutdown
Power Up
Waiting for POST to change
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Most Fails(cumulative): 0xA0
Shutdown
Power Up
Waiting for POST to change
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 49 - SHA_VERIFY 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Shutdown
Reached No. of Boots Required

Martin C · Aug 27, 2013

How much did you test it beforehand?

Where are your J-Runner screenshots and logs?

future_dj · Aug 27, 2013

I had it running smooth as f**k for like 2-3 weeks playing games and all sorts. and i really dont think you need my jrunner logs as im using a nand that I know works fine. im gunna try erasing the nand in nandpro (or if anyone knows a way to do it on 64bit, let me know!)

future_dj · Aug 27, 2013

Does no one see anything strange in my rater logs? Im not sure if there right or not

Martin C · Aug 27, 2013

The first thing I'd do is write the original NAND back. Make sure it still boots.

future_dj · Aug 27, 2013

heres (sort of) proof it is glitching corectly, i changed my dip settings from 8,7,2 to 8,7,4, after this, it wont glitch, heres rater to prove that:

Code:

Phat Selected
Version: 10
Power Up
Waiting for POST to change
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 08 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 0C 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 80 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Most Fails(cumulative): 0xA0
Shutdown

future_dj · Aug 27, 2013

Come on guys is anyone actually reading what Im typing? I've already said I've flash back to stock and it worked fine. Now after looking at this thread http://team-xecuter.com/forums/show...-your-CR3-PRO-Rater-Results-amp-Screenshots-! i see that the top posts rater log is different to mine and his loads the video driver! that must be the problamo, now all i need is a solution??

My xbox stops at "Post 6F - INIT_POWER_MODE", Next should be "Post 70 - INIT_VIDEO_DRIVER" so thats probs why im not getting a picture on my screen

Martin C · Aug 27, 2013

Because you don't have the AV cable connected?

future_dj · Aug 27, 2013

hdmi is defo in, but that would explain a lot, ill try a different cable

micheal321 · Aug 27, 2013

Was the plugin that XBLS sh*t? just curios have heard this happen before..

future_dj · Aug 27, 2013

Nope. Changed the cable and tested the old one (it works), still same error

future_dj · Aug 27, 2013

No it was freestyleplugin.xex (comes with freestyle) i wanted it to run when i was playing games nd shiz, wish i hadnt tried

tbh i dont see how it would cause this

gavin_darkglide · Aug 27, 2013

the f3plugin loads automatically with freestyle dash. Try using the stock component video.

Search

Search

Jasper R-Jtag glitches but wont boot after bad dashlanch plugin

future_dj

Full Member

DreamZ

future_dj

Full Member

future_dj

Full Member

gavin_darkglide

future_dj

Full Member

future_dj

Full Member

future_dj

Full Member

Martin C

future_dj

Full Member

future_dj

Full Member

Martin C

future_dj

Full Member

future_dj

Full Member

Martin C

future_dj

Full Member

micheal321

Full Member

future_dj

Full Member

future_dj

Full Member

gavin_darkglide