Jasper R-JTAG Problem

F

factistrue

Full Member
May 31, 2013
42
0
Re: R-Jtag solder points

Here's my log, I also fixed the AUD_Clamp wire to Q2N1.

Phat SelectedVersion: 10
Power Up
Waiting for POST to change
Post 88 - Panic - PROGRAM
Post A8 - Panic - SIG_VERIFY_3BL_CC
Post 88 - Panic - PROGRAM
Post B8 - Panic - CF auth failed
Post 88 - Panic - PROGRAM
Post 80
Post 88 - Panic - PROGRAM
Post 80
Post 88 - Panic - PROGRAM
Post 80
Post 88 - Panic - PROGRAM
Post 80
Post 88 - Panic - PROGRAM
Post 80
Post 88 - Panic - PROGRAM
Post 80
Post 08
Post 0D
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Most Fails(cumulative): 0xA0
Shutdown
Resetting................
Click to expand...
 
F

factistrue

Full Member
May 31, 2013
42
0
Re: R-Jtag solder points

CPU_RST is soldered to the bottom of the board. I moved it to the top of the board R8C2 and still the same results. I tried different dips ect.

Also tried jumper settings ect.
 
Last edited:
BL4K3Y

BL4K3Y

VIP Member
Jul 7, 2010
13,721
118
Colne, Lancashire (UK)
Why is the photo of CPU_RST missing?

Dip switches 7 and 8 need to be ON at all times with one other dip switch ON and the rest OFF.

Post your most recent J-Runner log please.
 
F

factistrue

Full Member
May 31, 2013
42
0
BL4K3Y said:
Why is the photo of CPU_RST missing?

Dip switches 7 and 8 need to be ON at all times with one other dip switch ON and the rest OFF.

Post your most recent J-Runner log please.
Click to expand...

Sorry the pic was blurry heres another of the CPU_RST IMG_20130927_191620.jpg

I set the dips 7 & 8 to always on and one other on the rest off. I change the other dip from 1-6.

Phat SelectedVersion: 10
Power Up
Waiting for POST to change
Post 88 - Panic - PROGRAM
Post 80
Post 88 - Panic - PROGRAM
Post 80
Post 88 - Panic - PROGRAM
Post 80
Post 88 - Panic - PROGRAM
Post 80
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Most Fails(cumulative): 0xA0
Shutdown
Resetting................
Click to expand...
 
F

factistrue

Full Member
May 31, 2013
42
0
So I changed the jumper to 330 and something new happens in rater with DIPS 7,8,3 ON the rest off. After first load of all post, it hangs on Post 79 - LOAD_XAM then TIMEOUT or SMC CORRUPTED shows. Any Ideas?
 
Last edited:
BL4K3Y

BL4K3Y

VIP Member
Jul 7, 2010
13,721
118
Colne, Lancashire (UK)
factistrue said:
So I changed the jumper to 330 and something new happens in rater. After first load of all post, it hangs on Post 79 - LOAD_XAM then TIMEOUT or SMC CORRUPTED shows. Any Ideas?
Click to expand...
I don't see how that would change anything.

The JTAG part of the hack doesn't kick in until the CPU reset is successful and from what I have seen in your RATER log, that isn't happening.

An A0 failure with a last POST of 21 means the wrong dip switch is set or D/E/F is bad/poorly soldered.

Can you confirm that J2B1.9 and J2B1.10 measure 3.3v (E & F on the motherboard)?

Does the console boot fine with the stock NAND written and 5v removed from the R-JTAG chip?
 
F

factistrue

Full Member
May 31, 2013
42
0
The A0 failure occurs since I set a cycle cap at 5 boot cycles. If I dont set a cap it will just keep going trying to glitch. The console does boot with original nand installed
 
BL4K3Y

BL4K3Y

VIP Member
Jul 7, 2010
13,721
118
Colne, Lancashire (UK)
factistrue said:
The A0 failure occurs since I set a cycle cap at 5 boot cycles. If I dont set a cap it will just keep going trying to glitch. The console does boot with original nand installed
Click to expand...
RATER is basically telling you what POST code the console failed on most often.

I really can't see what the issue is here unless I am missing something very obvious.

Your soldering is not great (no offense), but it doesn't look bad enough to cause problems.

Did you measure the voltage of E & F?

Have you tried cutting the CPU_RST wire down slightly (take about 5CM off it)?
 
F

factistrue

Full Member
May 31, 2013
42
0
BL4K3Y said:
RATER is basically telling you what POST code the console failed on most often.

I really can't see what the issue is here unless I am missing something very obvious.

Your soldering is not great (no offense), but it doesn't look bad enough to cause problems.

Did you measure the voltage of E & F?

Have you tried cutting the CPU_RST wire down slightly (take about 5CM off it)?
Click to expand...

Yes voltage is correct at 3.3v I tried to cut down the CPU_RST wire too. Changed jumper settings voltage settings etc, green light pluses on the R-Jtag chip but won't glitch I have no clue?

Are there alternate points I can solder to besides the one for the CPU_RST?
 
Last edited:
F

factistrue

Full Member
May 31, 2013
42
0
Instead of using the Post QSB is there a way to solder with wires to the R-Jtag chip instead? If so, any diagram.
Thanks
 
skillet34

skillet34

VIP Member
Jun 21, 2012
1,067
68
MA USA
Post 0 = FT6U1
Post 1 = FT6U7
Post 2 = FT6U6
Post 3 = FT6U5
Post 4 = FT6U4
Post 5 = FT6U3
Post 6 = FT6U2
Post 7 = FT6U8
 
You must log in or register to reply here.