R-JTAG No Boot , Rater passed .

C

cutest_squirrel

Noob Account
Oct 25, 2013
8
0
Console Type: Falcon




J-Runner log:
Code: 
[B][B][B][B][B][B][B]Phat Selected
[/B][/B][/B][/B][/B][/B][/B]
Code: 
Version: 10
Power Up
Waiting for POST to change
Post FB 
Post 0D 
Post ED 
Post 0D 
Post 8D - Panic - TRACE 
Post ED 
Post 0D 
Post ED 
Post 0D 
Post 8D - Panic - TRACE 
Post 0D 
Post 2D - SIG_VERIFY_3BL_CC 
Post 0D 
Post 8D - Panic - TRACE 
Post 0D 
Post ED 
Post 0D 
Post 8D - Panic - TRACE 
Post ED 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post FC 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post 04 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post FC 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post 04 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post FC 
Post FE 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post FC 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post FE 
Post FC 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post FC 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post FE 
Post FC 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post 8C - Panic - SYSTEM_CALL 
Post FC 
Post FE 
Post FC 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post FC 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post FE 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post FE 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post 8C - Panic - SYSTEM_CALL 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post FE 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post FC 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post FC 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post FC 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post CC 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post FE 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post FC 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post FC 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4D - DECODE_FUSES 
Post 51 - LOAD_UPDATE_2 
Post 52 - BRANCH 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 5B - INIT_KEYRING 
Post 5C - INIT_KEYS 
Post 5F 
Post 60 - INIT_KERNEL 
Post 6A - INIT_HAL_PHASE_1 
Shutdown
Power Up
Waiting for POST to change
Post 0D 
Post 8D - Panic - TRACE 
Post 0D 
Post 8D - Panic - TRACE 
Post 0D 
Post ED 
Post 0D 
Post 8D - Panic - TRACE 
Post CD 
Post 0D 
Post 8D - Panic - TRACE 
Post 0D 
Post ED 
Post 0D 
Post 8D - Panic - TRACE 
Post ED 
Post 0D 
Post ED 
Post 0D 
Post ED 
Post 0D 
Post 8D - Panic - TRACE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4D - DECODE_FUSES 
Post 51 - LOAD_UPDATE_2 
Post 52 - BRANCH 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 5B - INIT_KEYRING 
Post 5C - INIT_KEYS 
Post 5F 
Post 61 - INIT_HAL_PHASE_0 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Shutdown
Power Up
Waiting for POST to change
Post 0D 
Post ED 
Post 0D 
Post 8D - Panic - TRACE 
Post 0D 
Post ED 
Post 0D 
Post 8D - Panic - TRACE 
Post 0D 
Post ED 
Post 0D 
Post 8D - Panic - TRACE 
Post 0D 
Post 6D - INIT_KEY_EX_VAULT 
Post 0D 
Post 8D - Panic - TRACE 
Post 0D 
Post 8D - Panic - TRACE 
Post 0D 
Post 6D - INIT_KEY_EX_VAULT 
Post 0D 
Post 8D - Panic - TRACE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post 8C - Panic - SYSTEM_CALL 
Post FC 
Post FE 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post 8C - Panic - SYSTEM_CALL 
Post FC 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post 8C - Panic - SYSTEM_CALL 
Post FE 
Post FC 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post 8C - Panic - SYSTEM_CALL 
Post FC 
Post FE 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post 8C - Panic - SYSTEM_CALL 
Post FC 
Post FE 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post FC 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post FC 
Post 8C - Panic - SYSTEM_CALL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post FE 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post FC 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post FC 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post FC 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post 8C - Panic - SYSTEM_CALL 
Post FC 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post FC 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post FC 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post CC 
Post 8C - Panic - SYSTEM_CALL 
Post FC 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post FE 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post FE 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post FC 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4D - DECODE_FUSES 
Post 51 - LOAD_UPDATE_2 
Post 52 - BRANCH 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 5B - INIT_KEYRING 
Post 5C - INIT_KEYS 
Post 5F 
Post 60 - INIT_KERNEL 
Post 64 - INIT_MEMORY_MANAGER 
Post 6A - INIT_HAL_PHASE_1 
Most Fails(cumulative): 0xA0
Shutdown
Power Up
Waiting for POST to change
Post 0D 
Post ED 
Post 0D 
Post 8D - Panic - TRACE 
Post 0D 
Post 8D - Panic - TRACE 
Post 0D 
Post ED 
Post 0D 
Post 8D - Panic - TRACE 
Post 0D 
Post ED 
Post 0D 
Post 8D - Panic - TRACE 
Post ED 
Post 0D 
Post 8D - Panic - TRACE 
Post 0D 
Post ED 
Post 0D 
Post 8D - Panic - TRACE 
Post 0D 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post FE 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post FC 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post FC 
Post FE 
Post 8C - Panic - SYSTEM_CALL 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post FC 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post 8C - Panic - SYSTEM_CALL 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post FC 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post 8C - Panic - SYSTEM_CALL 
Post FC 
Post FE 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post FC 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post 8C - Panic - SYSTEM_CALL 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post FC 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post FE 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 41 - VERIFY_OFFSET 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4D - DECODE_FUSES 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 52 - BRANCH 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 5B - INIT_KEYRING 
Post 5C - INIT_KEYS 
Post 5F 
Post 61 - INIT_HAL_PHASE_0 
Post 6A - INIT_HAL_PHASE_1 
Most Fails(cumulative): 0xA0
Shutdown
Rater screenshot:



Image of R-JTAG board:

http://i.imgur.com/JAj2qES.jpg

Images of close-up soldering to motherboard:

http://imgur.com/a/Y3k97



Description of problem:

This is my first RGH/JTAG/R-JTAG to a console my soldering equipment isn't very good is a cheap solder iron 5 euros +/- .
I followed the tutorial , i messed up the CPU_RST on the down side of the board so used the upside one , Rater works but it doesn't successfully boot , i got the cpu key by IP because the hdmi output wasn't working for some reason.
I tried with component cable and hdmi but it isn't working, there is no RRoD. I would like to know if anyone has an idea where might be the problem . My soldering is probably completely messed up but my experience and equipment probably weren't enough for this job. I paid 80 euros for the parts (R-jtag + bank tax ) and i failed, should have asked a pro to do it


Settings:
Dip 4,7 ON
470
1.2V

With 5,7 and default voltage wasn't glitching in j-runner

Was the console working before you started: Y
 
Last edited:
C

cutest_squirrel

Noob Account
Oct 25, 2013
8
0
Hi jsinger47, is there any way for i know in what QSB there is the soldering problem or any way i can remove some of them from the list to double check?

Does the log help with finding the local of the fault?
 
Martin C

Martin C

VIP Member
Jan 10, 2004
35,981
0
Scotland, UK
www.team-xecuter.com
Use this image. Set the switches on the JTAG board to 0 and ON.

The coloured pairs should have continuity. They should NOT have continuity with other colours.

Also check J2D2.1 against GND. It should be 1.5k. Same with J2D2.2 and GND.
 

Attachments

G

gavin_darkglide

VIP Member
Dec 14, 2012
2,303
118
Did you check to make sure it would still boot stock after install. I always hook up the 5V after making sure the system still boots stock, then flash ecc. If it still boots stock check the points on the JTAG alt V2 qsb on the bottom of the board.
 
jsinger47

jsinger47

Troll Eating Dogs
Feb 6, 2011
8,133
128
Grand Rapids, MI
gavin_darkglide said:
Did you check to make sure it would still boot stock after install. I always hook up the 5V after making sure the system still boots stock, then flash ecc. If it still boots stock check the points on the JTAG alt V2 qsb on the bottom of the board.
Click to expand...
It is quite obvious that stock will boot as the console is getting past POST 2E.

It would be a waste of time to "test" that.
 
C

cutest_squirrel

Noob Account
Oct 25, 2013
8
0
I added some solder to the wire and heated the wire agaisnt the R8C2 and it got soldered, is probably bad but for reference my solder iron point is bigger than the entire R8C2. The downside CPU_rst point is gone , pulled it by mistakes and got everything, so i used max caution in the R8C2 .

I don't think i can fix R8C2 if it's the problem . I will check what martin said .
 
Last edited:
jsinger47

jsinger47

Troll Eating Dogs
Feb 6, 2011
8,133
128
Grand Rapids, MI
frazzeld said:
R8C2 is it making a good connection.....doesn't look too clever
Click to expand...
Ok, this is unacceptable.

Why did you bother to chime in?

Obviously his CPU-RST was 100% totally fine becuase his console was actually glitching.

Now, since you decided to give sh*tty advice, and he's a novice with an iron, we now have to use alternate points.

In short, if you don't know what you are talking about, don't talk.
 
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C

cutest_squirrel

Noob Account
Oct 25, 2013
8
0
Martin C said:
Use this image. Set the switches on the JTAG board to 0 and ON.

The coloured pairs should have continuity. They should NOT have continuity with other colours.

Also check J2D2.1 against GND. It should be 1.5k. Same with J2D2.2 and GND.
Click to expand...
Martin i checked the connectivity and it was ok , about the J2D2.1 I checked first time and it had 0.700 but i rechecked and now both j2d2.1 and j2d2.2 are reading 0.650 K ohms

EDIT: Ignore this values is actually 1.58 i had the 2k ->|- setting on that is for diode measuring i believe.
 
Last edited:
Martin C

Martin C

VIP Member
Jan 10, 2004
35,981
0
Scotland, UK
www.team-xecuter.com
cutest_squirrel said:
Martin i checked the connectivity and it was ok , about the J2D2.1 I checked first time and it had 0.700 but i rechecked and now both j2d2.1 and j2d2.2 are reading 0.650 K ohms
Click to expand...
That's too low. Check to see if they have continuity between them.
 
C

cutest_squirrel

Noob Account
Oct 25, 2013
8
0
Martin ignore previous post my bad, I was reading for 2k --> (with this symbol) i changed to 20k reading and it's 1.58 K
So that's normal right?

The jtag QSB checking was ok too, what else should i check? Want more closer up pictures of anything?

Thanks for all the help and sorry for being a noob.
 
Last edited:
C

cutest_squirrel

Noob Account
Oct 25, 2013
8
0
I edited previous post Martin i was reading wrong, the 2k setting of my MM has a symbol --> and doesnt give the right value, reading for 20k i get 1.58

This console has like 1 month gametime , i bought it in 2009 and didn't play much.
 
Martin C

Martin C

VIP Member
Jan 10, 2004
35,981
0
Scotland, UK
www.team-xecuter.com
If you're getting around 1.5k for both points, you're good.

TMS and TDI aren't used in normal circumstances so wouldn't be tested out of the factory. Use has nothing to do with it.
 
C

cutest_squirrel

Noob Account
Oct 25, 2013
8
0
Martin got it to boot to dashboard, Cycles are 2,1 normally (score of 8) . I changed the 5v wire only what probably doesn't matter because previous one length wasn't enough , because of the way was soldered, this one is a little bigger.

Now i will assemble everything and see if it boots in the case.
 
C

cutest_squirrel

Noob Account
Oct 25, 2013
8
0
Martin updates, when assembled blue wire is near dvd drive touching the downside of the dvd drive and when testing it can glitch at cycle 0 and work or can keep going and doesn't glitch 0xA0 . Does the blue wire can get the interference of the metal of the dvd drive ?

It was cycle 4 and nothing, then i forced the power off and insta booted to dashboard with cycle 0, i know logs would help here but i'm using a different pc i can post later.

In your opinion can be that since i'm using the R8C2 point , because without dvd drive is always 0 or 1 .


// Edit: Ok the 5v wire was to close and so was dvd cable i got a better position and all working now , Results over 9 rater score with 6 boots . Working atm i think i will assemble it, thanks for the help tbh i have no idea what was making it doesn't work.

Cheers
 
Last edited:
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