Post 6F - INIT_POWER_MODE no A0 or proper boot...

[daretogo]

Console Type: Jasper
NAND size: 512
Dashboard version: e.g 2.0.16547
CB version: e.g 6754

Screenshot of NAND details from J-Runner: http://i.imgur.com/BrdlA8O.png

J-Runner log:

===================================================
Sunday, April 20, 2014 7:55:09 AM


J-Runner v0.3 Beta (4) Started






Checking Files
Finished Checking Files
Initializing nanddump2.bin..
Jasper BB
Jtag Selected
Nand Initialization Finished
Initializing nanddump1.bin..
Jasper BB
Nand Initialization Finished
Comparing...Takes a while on big nands
Bad Block ID  01DE Found @ 0x01FF [Offset: 0x41DF000]
Block ID 01FF [Offset: 0x41DF000] remapped to Block ID 01DE [Offset: 0x3D9E000]
Bad Blocks Remapped
Bad Block ID  01DE Found @ 0x01FF [Offset: 0x41DF000]
Block ID 01FF [Offset: 0x41DF000] remapped to Block ID 01DE [Offset: 0x3D9E000]
Bad Blocks Remapped
Nands are the same
R-Jtag Selected
Patching Jasper version 2.3 SMC at offset 0x12BA
XeLL file created Successfully jasper_bb.bin

Version: 03
Flash Config: 0x00AA3020
Writing Nand
jasper_bb.bin
Done!
in 0:09 min:sec

POST output from J-Runner (either POST_OUT monitor or RATER output):

Phat Selected
Version: 10
Power Up
Waiting for POST to change
Post 10 - Payload/1BL started 
Post 90 - Panic - VMX_ASSIST 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Most Fails(cumulative): 0x22
[B][B][B][B][B][B][B]Shutdown
[/B][/B][/B][/B][/B][/B][/B]

updflash.bin log (if applicable): Not applicable.

Image of R-JTAG board: http://i.imgur.com/t6gjNyn.jpg

Images of close-up soldering to motherboard:

http://imgur.com/KATyn7V,xUCQes9,cpc6uVF,p3vxSaw,v4hAWkQ,VXXlhTg


Description of problem: From the post out log it looks like I am booting, I see the HWINT which I usually associate with a successful boot, but it's obviously not a proper full boot. I'm missing the A0 in my output



Was the console working before you started: Yes.


I realize that my soldering is a little messy - sorry about that. It has been done and redone so many times that I haven't been going for perfection. I can 100% successfully read/write to the nand, and even now if I write back to stock and disconnect power to the RJTAG I can boot stock no problem.

Referencing this earlier thread: http://team-xecuter.com/forums/showthread.php?t=138969 I realize that the most likely cause of this situation is bad JTAG wiring but I'm having a hard time figuring out where. I started off with the JTAG QSB and at one point convinced myself that the diodes on it were bad, so I lifted them and replaced them with the 1N4148 I keep around for regular JTAG which changed nothing. Eventually I figured some other trace on the QSB must have been bad and removed it entirely replacing it with what you see in the image. I know the diodes are hidden by the heatshrink tubing, but I'm 99.9% certain they are oriented properly.

I've referenced this image and verified continuity on the J2D2 header for all the JTAG wiring points... I'm just hoping that I have missed something obvious.

 

[Martin C]

[h=3](R-)JTAG Troubleshooting once past POST 0x2E[/h]

 

[daretogo]

(R-)JTAG Troubleshooting once past POST 0x2E

Thanks for the link Martin, I had indeed missed that post - however I believe I've covered all but "3" from that post in my previous testing.


1. SMC Configuration vs JTAG setting. --- I'm very confident that I have RJTAG selected, and currently do not have AUD_CLAMP enabled as that is not the wiring I have done. I have tried with AUD_CLAMP wiring however when I was still trying with the QSB.

2. JTAG component/wiring issues. -- I still think this is most likely, and have provided pictures of my wiring... still hoping I'm missing something. I'm now 110% confident that my diodes are oriented properly.

3. TDI/TMS connection to the GPU. - Tested and measures 1.6Kohm which seems "around" the 1.5Kohm mentioned.



I think if nothing else I'll switch it up and go for RGH2 just to see if I can get that running... but I'm very open to any other specific ideas.

 

[gavin_darkglide]

Try aud_clamp wiring. I have had better luck using aud_clamp. Also is there a reason u didnt use the jtag qsb?

 

[Taijigamer2]

Have u flashed back to stock and checked it boots? Are u using ROL wiring now because the images u supplied are still of AUD clamp. I'm sure a man of u'r calibre will get this figured out. Good luck

 

[gavin_darkglide]

Have u flashed back to stock and checked it boots? Are u using ROL wiring now because the images u supplied are still of AUD clamp. I'm sure a man of u'r calibre will get this figured out. Good luck

I did not see any images of aud_clamp wiring. I went through them all. While the soldering could be better, it gets past the glitch. This could be something as simple as adjusting power mode in the smc config.

 

[Taijigamer2]

My mistake, from a distance it looked like it was soldered to Q2N1.

 

[daretogo]

I initially used the QSB in conjunction with AUD_CLAMP but had the identical post result.

Messing with the power mode in the SMC is something I have not yet tried, anyone got a quick link?

And yes, to restate, I have flashed back to stock and yes it still boots.

 

[gavin_darkglide]

Open nand in j-runner, there should be an option for smc_config editor in one of the menus, dont know which one off the top of my head.

The possible alternative values for Power Mode can be 8080 or 8280 or 8380 or 8480
The possible alternative values for Power VCS Control can be 8555 or 8565
The possible alternative values for ANA Fuse Value can be 01 or 03


then all you have to do is save, and write to console, a combination of setting changes may be all your console needs.

 

[daretogo]

Just for posterity, this "resolved" without any real fix.

I went through all the power modes and combinations with no change. I'm still convinced that some microscopic damage to J2D2 was the culprit. It'll teach me to be more careful about picking up work after other people.

I ended up switching it up and RGH2'ing this console and it works just fine. Averaging 30 second or so boot times with an old CR3 Lite I had laying around after some tweaking.


Can't win 'em all.