R-JTAG falcon no boot

[HatedSkill]

Console Type: Falcon
NAND size: 16
Dashboard version 2.0.16203
CB version: 5774
Screenshot of NAND details from J-Runner:
POST output from J-Runner (either POST_OUT monitor or RATER output):
(2 cycles is enough)



Patching Jasper version 2.3 SMC at offset 0x12BA
XeLL file created Successfully falcon_hack_aud_clamp.bin
Version: 03
Flash Config: 0x01198010
Writing Nand
falcon_hack_aud_clamp.bin
Done!
in 0:10 min:sec

Version: 10
Power Up
Waiting for POST to change
Shutdown
Resetting................
Version: 10
Power Up
Waiting for POST to change
Post 01 
Post D1 - READ_FUSES 
Post F1 - Panic - VERIFY_HEADER_CB_B 
Post CD 
Post FD 
Post C5 - LZX_EXPAND_5 
Post FD 
Post CD 
Post C5 - LZX_EXPAND_5 
Post FD 
Post CD 
Post FD 
Post CD 
Post FD 
Post CD 
Post FD 
Post CD 
Post FD 
Post C9 
Post CD 
Post FD 
Post CD 
Post FD 
Post 1B - RC4_DECRYPT 
Post 1D - SIG_VERIFY 
Post 1F 
Post 21 - INIT_SECOTP 
Post A1 - Panic - VERIFY_SECOTP_7 
Post 01 
Post 85 - Panic - INSTRUCTION_SEGMENT 
Post 8D - Panic - TRACE 
Post FD 
Post 8D - Panic - TRACE 
Post 8D - Panic - TRACE 
Post FD 
Post 8D - Panic - TRACE 
Post FD 
Post 8D - Panic - TRACE 
Post 8D - Panic - TRACE 
Post FD 
Post 8D - Panic - TRACE 
Post 8D - Panic - TRACE 
Post FD 
Post 8D - Panic - TRACE 
Post FD 
Post 8D - Panic - TRACE 
Post 8D - Panic - TRACE 
Post 01 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 13 - FSB_CONFIG_TX_STATE 
Post 15 - FETCH_OFFSET 
Post 17 - VERIFY_HEADER 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1D - SIG_VERIFY 
Post 1F 
Post 21 - INIT_SECOTP 
Post A1 - Panic - VERIFY_SECOTP_7 
Post 01 
Post 8D - Panic - TRACE 
Post FD 
Post 8D - Panic - TRACE 
Post 8D - Panic - TRACE 
Post FD 
Post 8D - Panic - TRACE 
Post 85 - Panic - INSTRUCTION_SEGMENT 
Post 8D - Panic - TRACE 
Post FD 
Post 8D - Panic - TRACE 
Post FD 
Post 8D - Panic - TRACE 
Post 8D - Panic - TRACE 
Post FD 
Post 8D - Panic - TRACE 
Post 8D - Panic - TRACE 
Post FD 
Post 8D - Panic - TRACE 
Post 1B - RC4_DECRYPT 
Post 1D - SIG_VERIFY 
Post 1F 
Post 21 - INIT_SECOTP 
Post A1 - Panic - VERIFY_SECOTP_7 
Post 01 
Post FD 
Post 8D - Panic - TRACE 
Post FD 
Post 8D - Panic - TRACE 
Post 85 - Panic - INSTRUCTION_SEGMENT 
Post 8D - Panic - TRACE 
Post FD 
Post 8D - Panic - TRACE 
Post FD 
Post 85 - Panic - INSTRUCTION_SEGMENT 
Post FD 
Post 8D - Panic - TRACE 
Post 8D - Panic - TRACE 
Post 85 - Panic - INSTRUCTION_SEGMENT 
Post 8D - Panic - TRACE 
Post 85 - Panic - INSTRUCTION_SEGMENT 
Post FD 
Post 8D - Panic - TRACE 
Post FD 
Post 8D - Panic - TRACE 
Post 05 
Post 8D - Panic - TRACE 
Post 01 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 13 - FSB_CONFIG_TX_STATE 
Post 15 - FETCH_OFFSET 
Post 17 - VERIFY_HEADER 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1D - SIG_VERIFY 
Post 1F 
Post 21 - INIT_SECOTP 
Post A1 - Panic - VERIFY_SECOTP_7 
Post 01 
Post 81 - Panic - MACHINE_CHECK 
Post 8D - Panic - TRACE 
Post 8D - Panic - TRACE 
Post FD 
Post 85 - Panic - INSTRUCTION_SEGMENT 
Post 8D - Panic - TRACE 
Post FD 
Post 85 - Panic - INSTRUCTION_SEGMENT 
Post 8D - Panic - TRACE 
Post FD 
Post 8D - Panic - TRACE 
Post 85 - Panic - INSTRUCTION_SEGMENT 
Post 8D - Panic - TRACE 
Post FD 
Post 8D - Panic - TRACE 
Post 8D - Panic - TRACE 
Post 85 - Panic - INSTRUCTION_SEGMENT 
Post 05 
Post 85 - Panic - INSTRUCTION_SEGMENT 
Post FD 
Post 01 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 13 - FSB_CONFIG_TX_STATE 
Post 15 - FETCH_OFFSET 
Post 17 - VERIFY_HEADER 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1D - SIG_VERIFY 
Shutdown

 

[HatedSkill]

Sent from my SAMSUNG-SGH-I317 using Tapatalk 2

 

[Martin C]

Your post_out looks wrong.

Remove the ribbon and unplug the PSU. Grab your MM and set to 10k and measure each post_out pad on the QSB against GND. Report back here.

 

[jsinger47]

Your POST output is bad.

Check your POST soldering and continuity.

 

[HatedSkill]

Post 80
Post 71 - INIT_AUDIO_DRIVER
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 40 - Entrypoint of CD reached
Post 20 - CB entry point reached
Post 60 - INIT_KERNEL
Post 40 - Entrypoint of CD reached
Post 20 - CB entry point reached
Post 60 - INIT_KERNEL
Post 20 - CB entry point reached
Post 60 - INIT_KERNEL
Post 60 - INIT_KERNEL
Post 80
Post 03
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post E0
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 48 - SHA_COMPUTE
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1C - SHA_COMPUTE
Post 1C - SHA_COMPUTE
Post 01
Post 09
Post 13 - FSB_CONFIG_TX_STATE
Post 4F - VERIFY_OFFSET_6BL_CF
Post 9F - Panic - VERIFY_SECOTP_5
Post 7F
Post FE
Post F8
Post F0 - Panic - VERIFY_OFFSET_CB_B
Post E0
Post 80
Post 03
Post 07
Post 1E - BRANCH
Post 3D
Post F7
Post EF
Post 40 - Entrypoint of CD reached
Post D9 - SHA_COMPUTE_CB_B
Post 40 - Entrypoint of CD reached
Post E7
Post F7

i checked all points with MM at 20k mine dont have 10k , all points showed about 13k
after about 5 cycles xbox red rings

 

[HatedSkill]

Sent from my SAMSUNG-SGH-I317 using Tapatalk 2


This point showed 0 so I added straight from point to point on qsb and it now shows 13 k

 

[BL4K3Y]

Use CODE tags for any logs please - it makes threads much easier to read.

Which dip switches have you tried?

 

[Martin C]

So that looks better now. Post your full J-R log please.

 

[HatedSkill]

I opened it and after 5 cycles rrod

Sent from my SAMSUNG-SGH-I317 using Tapatalk 2

 

[Martin C]

I opened it and after 5 cycles rrod

Sent from my SAMSUNG-SGH-I317 using Tapatalk 2

We need your full J-R log, not just the stuff you want to show us. If you can't provide, we can't help.

 

[HatedSkill]

This is my complete log from today

===================================================Sunday, July 21, 2013 11:00:28 AM


J-Runner v0.2 Beta (289) Started




WARNING! - Your selected working directory already contains files!
You can view these files by using 'Show Working Folder' Button




Checking Files
Downloaded *common/PICFLASH_E_1_0_5-JRP-V2.HEX
Finished Checking Files
Could not find a part of the path.


===================================================
Sunday, July 21, 2013 12:28:57 PM


J-Runner v0.2 Beta (289) Started




WARNING! - Your selected working directory already contains files!
You can view these files by using 'Show Working Folder' Button




Checking Files
Finished Checking Files
Version: 10
Flash Config: 0x00000000
Can not Continue
Version: 00
Wrong Version.
Version: 03
Flash Config: 0x01198010
Erasing Nand
Done!
in 0:14 min:sec


Version: 03
Flash Config: 0x01198010
Writing Nand
nanddump1.bin
Done!
in 2:07 min:sec


Patching Jasper version 2.3 SMC at offset 0x12BA
XeLL file created Successfully falcon_hack_aud_clamp.bin
Version: 03
Flash Config: 0x01198010
Writing Nand
falcon_hack_aud_clamp.bin
Done!
in 0:10 min:sec


Version: 10
Power Up
Waiting for POST to change
Shutdown
Resetting................
Version: 10
Power Up
Waiting for POST to change
Post 01 
Post D1 - READ_FUSES 
Post F1 - Panic - VERIFY_HEADER_CB_B 
Post CD 
Post FD 
Post C5 - LZX_EXPAND_5 
Post FD 
Post CD 
Post C5 - LZX_EXPAND_5 
Post FD 
Post CD 
Post FD 
Post CD 
Post FD 
Post CD 
Post FD 
Post CD 
Post FD 
Post C9 
Post CD 
Post FD 
Post CD 
Post FD 
Post 1B - RC4_DECRYPT 
Post 1D - SIG_VERIFY 
Post 1F 
Post 21 - INIT_SECOTP 
Post A1 - Panic - VERIFY_SECOTP_7 
Post 01 
Post 85 - Panic - INSTRUCTION_SEGMENT 
Post 8D - Panic - TRACE 
Post FD 
Post 8D - Panic - TRACE 
Post 8D - Panic - TRACE 
Post FD 
Post 8D - Panic - TRACE 
Post FD 
Post 8D - Panic - TRACE 
Post 8D - Panic - TRACE 
Post FD 
Post 8D - Panic - TRACE 
Post 8D - Panic - TRACE 
Post FD 
Post 8D - Panic - TRACE 
Post FD 
Post 8D - Panic - TRACE 
Post 8D - Panic - TRACE 
Post 01 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 13 - FSB_CONFIG_TX_STATE 
Post 15 - FETCH_OFFSET 
Post 17 - VERIFY_HEADER 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1D - SIG_VERIFY 
Post 1F 
Post 21 - INIT_SECOTP 
Post A1 - Panic - VERIFY_SECOTP_7 
Post 01 
Post 8D - Panic - TRACE 
Post FD 
Post 8D - Panic - TRACE 
Post 8D - Panic - TRACE 
Post FD 
Post 8D - Panic - TRACE 
Post 85 - Panic - INSTRUCTION_SEGMENT 
Post 8D - Panic - TRACE 
Post FD 
Post 8D - Panic - TRACE 
Post FD 
Post 8D - Panic - TRACE 
Post 8D - Panic - TRACE 
Post FD 
Post 8D - Panic - TRACE 
Post 8D - Panic - TRACE 
Post FD 
Post 8D - Panic - TRACE 
Post 1B - RC4_DECRYPT 
Post 1D - SIG_VERIFY 
Post 1F 
Post 21 - INIT_SECOTP 
Post A1 - Panic - VERIFY_SECOTP_7 
Post 01 
Post FD 
Post 8D - Panic - TRACE 
Post FD 
Post 8D - Panic - TRACE 
Post 85 - Panic - INSTRUCTION_SEGMENT 
Post 8D - Panic - TRACE 
Post FD 
Post 8D - Panic - TRACE 
Post FD 
Post 85 - Panic - INSTRUCTION_SEGMENT 
Post FD 
Post 8D - Panic - TRACE 
Post 8D - Panic - TRACE 
Post 85 - Panic - INSTRUCTION_SEGMENT 
Post 8D - Panic - TRACE 
Post 85 - Panic - INSTRUCTION_SEGMENT 
Post FD 
Post 8D - Panic - TRACE 
Post FD 
Post 8D - Panic - TRACE 
Post 05 
Post 8D - Panic - TRACE 
Post 01 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 13 - FSB_CONFIG_TX_STATE 
Post 15 - FETCH_OFFSET 
Post 17 - VERIFY_HEADER 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1D - SIG_VERIFY 
Post 1F 
Post 21 - INIT_SECOTP 
Post A1 - Panic - VERIFY_SECOTP_7 
Post 01 
Post 81 - Panic - MACHINE_CHECK 
Post 8D - Panic - TRACE 
Post 8D - Panic - TRACE 
Post FD 
Post 85 - Panic - INSTRUCTION_SEGMENT 
Post 8D - Panic - TRACE 
Post FD 
Post 85 - Panic - INSTRUCTION_SEGMENT 
Post 8D - Panic - TRACE 
Post FD 
Post 8D - Panic - TRACE 
Post 85 - Panic - INSTRUCTION_SEGMENT 
Post 8D - Panic - TRACE 
Post FD 
Post 8D - Panic - TRACE 
Post 8D - Panic - TRACE 
Post 85 - Panic - INSTRUCTION_SEGMENT 
Post 05 
Post 85 - Panic - INSTRUCTION_SEGMENT 
Post FD 
Post 01 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 13 - FSB_CONFIG_TX_STATE 
Post 15 - FETCH_OFFSET 
Post 17 - VERIFY_HEADER 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1D - SIG_VERIFY 
Shutdown===================================================Sunday, July 21, 2013 1:03:13 PM


J-Runner v0.2 Beta (289) Started




WARNING! - Your selected working directory already contains files!
You can view these files by using 'Show Working Folder' Button




Checking Files
Finished Checking Files
Version: 10
Press Escape to exit
Waiting for POST to change
Post 80
Post 71 - INIT_AUDIO_DRIVER
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 40 - Entrypoint of CD reached
Post 20 - CB entry point reached
Post 60 - INIT_KERNEL
Post 40 - Entrypoint of CD reached
Post 20 - CB entry point reached
Post 60 - INIT_KERNEL
Post 20 - CB entry point reached
Post 60 - INIT_KERNEL
Post 60 - INIT_KERNEL
Post 80
Post 03
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post E0
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 48 - SHA_COMPUTE
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1C - SHA_COMPUTE
Post 1C - SHA_COMPUTE
Post 01
Post 09
Post 13 - FSB_CONFIG_TX_STATE
Post 4F - VERIFY_OFFSET_6BL_CF
Post 9F - Panic - VERIFY_SECOTP_5
Post 7F
Post FE
Post F8
Post F0 - Panic - VERIFY_OFFSET_CB_B
Post E0
Post 80
Post 03
Post 07
Post 1E - BRANCH
Post 3D
Post F7
Post EF
Post 40 - Entrypoint of CD reached
Post D9 - SHA_COMPUTE_CB_B
Post 40 - Entrypoint of CD reached
Post E7
Post F7

 

[Martin C]

Did you make sure you selected R-JTAG when you selected create/write xell?

 

[HatedSkill]

dips 7 and 3 on and 1.8v jumper results

Version: 10Power Up
Waiting for POST to change
Post 80 
Post 4D - DECODE_FUSES 
Post F0 - Panic - VERIFY_OFFSET_CB_B 
Post E0 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 60 - INIT_KERNEL 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 70 - INIT_VIDEO_DRIVER 
Post 79 - LOAD_XAM 
Most Fails(cumulative): 0xA0
Shutdown

 

[HatedSkill]

rjtag selected and aud clamp selected and is that jasper smc suppose
to be there

Version: 03Flash Config: 0x01198010
Erasing Nand
Done!
in 0:13 min:sec


Version: 03
Flash Config: 0x01198010
Writing Nand
nanddump1.bin
Done!
in 2:11 min:sec


Patching Jasper version 2.3 SMC at offset 0x12BA
XeLL file created Successfully falcon_hack_aud_clamp.bin
Version: 03
Flash Config: 0x01198010
Writing Nand
falcon_hack_aud_clamp.bin
Done!
in 0:10 min:sec

 

[AllyNerd]

Change your jumper to 1-3 on the jtag qsb for use with audclamp

 

[Martin C]

dips 7 and 3 on and 1.8v jumper results

Version: 10Power Up
Waiting for POST to change
Post 80 
Post 4D - DECODE_FUSES 
Post F0 - Panic - VERIFY_OFFSET_CB_B 
Post E0 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 60 - INIT_KERNEL 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 70 - INIT_VIDEO_DRIVER 
Post 79 - LOAD_XAM 
Most Fails(cumulative): 0xA0
Shutdown

That's almost there. Try DIP 4 instead.

 

[HatedSkill]

Teied 4 got rrod switched jtag qsb to 1-3 and rrod everything gives me rrod lol any ideas could it be the jtag qsb

Sent from my SAMSUNG-SGH-I317 using Tapatalk 2

 

[Martin C]

Teied 4 got rrod switched jtag qsb to 1-3 and rrod everything gives me rrod lol any ideas could it be the jtag qsb

Sent from my SAMSUNG-SGH-I317 using Tapatalk 2

It has nothing to do with the JTAG QSB.

You shouldn't even be playing around with the QSB at this stage, unless of course you're getting E79 on screen?

 

[AllyNerd]

It could be. So when you got to post 79 load xam the box didnt boot into the glitched dash? Or are you just trying to get into xell? And im assuming you checked out the qsb already? You have continuity from the motherboard points to say the beginning of the diode and 4 and 7 have continuity also(check top of board).

 

[AllyNerd]

It has nothing to do with the JTAG QSB.

You shouldn't even be playing around with the QSB at this stage, unless of course you're getting E79 on screen?

How is it possible to boot when 1-2 is jumpered on qsb but hes using audclamp wiring? Doesnt look like the resistor is even soldered and even if it were he would need to build a different image correct?