JTAG R-JTAG Zephyr 15574 CB 4569 Post code question

Taijigamer2

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Jun 8, 2013
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Are you using R-jtag or RGH on this console because u keep saying coolrunner. Not sure if its been asked but is this a R-jtag v1.0 or v1.1 as the v1.1 works better with zephyrs. Like the Admins stated, posts 6x are related to jtag wiring so smooth those out. Boot times with R-jtag should be instant to 30 seconds, anything over that I would be wanting to optimise.
 

bobgatz

Junior Member
Sep 27, 2013
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Thanks for the response. It is an R-Tag v1.0 board with v1.1 firmware on the chip. (I thought that R-Jtag was a Coolrunner with a new program.) In previous posts, I stated that with only Xell Reloaded flashed to the nand, I got successful boots 5 out of 5 times. However, when I built the full image and wrote that to the nand, successful boots were few and very far between. So, with no changes other than what is written to the nand, it cannot be a soldering issue, where it boots perfectly in one, but fails in another. The same soldering exists for both. I will also re-iterate, that it boots much, much better with a falcon image, than with a zephyr (if 1 out of 50 attempts can be called better). As far as optimization goes, I have stated that I have tried every possible combination of options, even selecting sw 7-8 off-off, off-on (for zephyr) and on-off (for falcon. Just 1 option left, using the top-side rst point with my own soldered flat cable. Will try that soon, but I don't expect any significant difference.

Edit: Another question - With no jumpers on the voltage selection pads, what is the voltage on the center pad? I measure 1.9V, same as the so-called 1v8 pad. The pads are NOT bridged, as verified with an ohmmeter, which measures 480K between them.
 
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bobgatz

Junior Member
Sep 27, 2013
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Finally got some free time and tried again with the top cpu_rst point. Same results. From reading other R-Jtag support posts, I see that the R-Jtag board says v1.1. Mine says v1.0 with a sticker on the chip that says v1.1 firmware. Can someone verify that the only difference between R-Jtag v1.0 and v1.1 is firmware only? If so, is it worth trying the transistor Jtag? Obviously, the voltage drop on a transistor is considerably less than a diode, and could perhaps make a difference?
 

jsinger47

Troll Eating Dogs
Feb 6, 2011
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Grand Rapids, MI
Finally got some free time and tried again with the top cpu_rst point. Same results. From reading other R-Jtag support posts, I see that the R-Jtag board says v1.1. Mine says v1.0 with a sticker on the chip that says v1.1 firmware. Can someone verify that the only difference between R-Jtag v1.0 and v1.1 is firmware only? If so, is it worth trying the transistor Jtag? Obviously, the voltage drop on a transistor is considerably less than a diode, and could perhaps make a difference?
Your rjtag chip is not at fault since you were getting past POST22.

As stated earlier, fails at Post late in the boot are due to faulty JTAG wiring or a faulty GPU

In the case of a spelling error, I blame Tapatalk.
 

jsinger47

Troll Eating Dogs
Feb 6, 2011
8,133
128
Grand Rapids, MI
I would still like confirmation that a v1.0 board with a sticker on the chip saying v1.1 firmware, is in fact a v1.1 board, since from this post http://team-xecuter.com/forums/show...UPDATED-AUGUST-10TH-2013-***?highlight=zephyr I understand that a v1.0 board is not recommended for Zephyrs. Or was I sold a v1.0 board as a v1.1 by a shady dealer.
You have the correct chip. As you can clearly see from your POST, it is working as intended.

In the case of a spelling error, I blame Tapatalk.
 

bobgatz

Junior Member
Sep 27, 2013
23
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I have not given up yet! I decided to try again, almost from scratch. I loaded my nandump (with my cpu key) selected Falcon R-Jtag and aud_clamp, built the image on dash 15574 and wrote it to the nand. This seems to give better results than building the image without a nandump. R-Jtag options are 1v2, sw2 and 0 ohms. The cpu_rst connection is on the topside. Below is the rater log.

Out of the 20 boot cycles, only 4 were successful, even though rater gave me a high score. Seems that rater only counts successful glitches, and not successful boots. Interestingly, I actually had 2 successful boots with a final post code of 6F. I'm not sure which boot tries they were, but #10 may have been one of them.

Since there seems to be a consensus that a final post code of 6C - 6F means bad J-tag soldering, and I am confident that the soldering is good, that tells me that perhaps the transistor wiring may give better results. I will be in the city this weekend and will pick up some 2N3904 transistors and give it a try. This is a bad time of year for free time with baseball playoffs on, and both football and hockey as well. Will post results probably oct 15.
 

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jsinger47

Troll Eating Dogs
Feb 6, 2011
8,133
128
Grand Rapids, MI
Interesting that it is falling on init power mode. Can you post a screen of your smc-Config?

In the case of a spelling error, I blame Tapatalk.
 

bobgatz

Junior Member
Sep 27, 2013
23
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Here are updated pics and SMCconfig. I have verified all connections by measuring to alternate points, (with the exception of the post connections) and they are fine. I am testing with all peripherals (except USB stick), but the board is open on the desk.Once I get more consistent results, I will install in chassis and fine tune. The resistor selection is simply a pull-up for the TRST signal, so I don't think it will have much effect on the results. In fact, the stronger the pull-up (ie 0 ohms) the less chance of the Jtag port being inadvertently reset. However, I have tried all settings in the past, and will do so again, after I get my transistors installed. If there is anything else I can try before then, let me know and I will give it a shot.
 

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Taijigamer2

VIP Member
Jun 8, 2013
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England
Yeah I never installed in chassis when testing but peripherals is essential and fine tuning is done with a complete setup, adding or removing anything and u might aswell start from scratch with tuning. Not sure what's going on with your jtag Qsb but that maybe the source of your issues.
 

bobgatz

Junior Member
Sep 27, 2013
23
0
Thanks for the suggestion. Loaded my nandump, edited smcconfig, selected Falcon, R-jtag and aud_clamp, built image and wrote it to the nand. Hard to say whether it changed anything. Initially, I would have said it was much worse, even tried each sw setting 1 through 6, but then reloaded the previous build and it, too was about the same. Without disturbing the hardware, simply writing the new image, testing, and then writing back the previous image, the results have deteriorated. I suppose it could be a heat issue, even though the heatsinks don't feel that hot. In act, they are much cooler than when, after a successful boot, I let it run for a while before shutting down.

Anyway, time to give it a rest, cause it's almost sports and Miller time!
 

gazcoigne

BANNED
Jan 31, 2005
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Belfast, UK
your jtag qsb looks like its lifted and as previously said the soldering is woeful, thats the source of all your issues. im ure that the solder points are being stressed when moving the mobo around, you need the qsb's to lie flat on the board i have no idea why you have it floating a few mm above the board.
 
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bobgatz

Junior Member
Sep 27, 2013
23
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The reason the board is lifted at the end is because of the R2P12 repair that ripped up the traces connected to it. I could have done a better job of it but it works, and I don't want to disturb it now.

In my research to better understand the boot process, I came across an interesting post by Blackaddr that I believe is relevant in my situation. I have copied a portion of it below. If I can figure out how to change the TDI input from DB1F1 to TRAY_OPEN I will give it a try. If DB1F1 is related to HDMI, it could explain why I am getting post 70 early in the glitch cycle, and perhaps also why it seems to boot but there is no video out on my HDMI port.
Code:
Blackaddr released Xbox 360 SMC I/O Config Utility:

DESCRIPTION:
This is a simple utility to reconfigure output pins on the SMC that are used to execute the JTAG transaction to the GPU. The utility only supports decrypted SMC files which already contain the JTAG hack code. It is used to research and fix problems caused by sharing SMC output pins, or caused by the bit timing of the JTAG data.

FEATURES:
* Basic Mode:
-Change only the TMS signal to use AUD_CLAMP pin. Fixes many issues, a good starting point for testing.
* Advanced Mode (for researchers):
-Change the TMS and TDI signals to any general purpose I/O pin on the SMC.
-Change the TMS lead-in delay. This determines how long between a TMS logic change and the assertion of TCLK.
-Change the TCLK period. The bit rate is controlled by changing the delay between TCLK level transitions.

USEFUL INFO:
* The purpose of this utility is to help fix and research boot issues caused by SMC I/O sharing or JTAG bit timing. On non-Xenon consoles, there are no unused I/O available, so we have to borrow some from Microsoft.
* The original hack borrowed ARGON_DATA for TMS, which is the data line that controls the Ring of Light and RF board. This can cause weird issues with the controller and LED display (particularly Falcons) and E79 issues on Zephyr. [B][COLOR=#ff0000]The original hack also borrowed DB1F1 which is used for HDMI purposes(?) on the ANA/HANA chip. It could causes issues with setting up the output video, especially HDMI resulting in boot failures.[/COLOR][/B]
* At the time of this release, two new I/O have been found that are not critical to system boot. First is AUD_CLAMP. This signal is an control signal that mutes the output of the analog audio. It has no interaction with system boot and is an excellent replacement for TMS. The second I/O is TRAY_OPEN. It is a logic signal that tells the DVD drive to open or close. It does not interfere with boot, however on some DVD drives, the tray may eject on bootup, it depends on the mobo/drive combination. It can be useful for moving TDI if boot failures persist.
* Many issues seem to be resolved simply by moving the TMS signal from the RF header to the AUD_CLAMP.

!Update! v0.2 Alpha has been released. What's new/fixed
* This is a minor update to include a bugfix found by Tiros in the original JTAG code. It is discussed here.

You might as well try the bugfix first before going to the trouble of rewiring. Run version 0.2a with the following parameters. It will apply the bugfix, but will patch the SMC with the original wiring. The program only takes in a SMC with the original wiring config since it looks for this configuration to find patch locations.
smc_io SMC_dec.bin SMC_patched.bin 83 28 C0 03
If you still have issues, run the basic mode and move the TMS wire (at RF header) to AUD_CLAMP. [COLOR=#ff0000][B]If you still have issues and are using diodes, switch to transistors.[/B][/COLOR]
 

bobgatz

Junior Member
Sep 27, 2013
23
0
I do not want to replace aud_clamp. I want to try using aud_clamp and tray_open instead of aud_clamp and DB1F1.