RRod 0010 Falcon

Scrufdog

VIP Member
Jun 12, 2011
374
0
Baltimore, MD
Console Type: Falcon
NAND size: 16
Dashboard version: 16203
CB version: e.g 5774
Screenshot of NAND details from J-Runner:
(attach an image to your post)
J-Runner log:
POST output from J-Runner (either POST_OUT monitor or RATER output):
(2 cycles is enough)
updflash.bin log (if applicable):
Image of R-JTAG board:
Images of close-up soldering to motherboard:
(attach images to your post)


Description of problem: First, I tried to RGH2 this a couple weeks ago. Got it to boot Xell once and glitch dash once. I have the CPU Key obviously. Decided to R-JTAG it so it would actually work.

Cant get to either Xell or Glitch Dash. Have tried all 18 combinations of dips/voltages. Using JTAG Aud_Clamp option at 470 ohms, have not tried other settings. It usually runs through about 5 glitch attempts then RRoD 0010, whether trying to boot Xell or Dash. Have tried both standard and Alt CPU_RST points. Checked resistance on both, good. Would like to know how to progress next. Have tried creating NANDs in JR 2.89 for rjtag nand 16203, and tried an updated JRv3 for dash 16537. I'm probably forgetting something. Ask away.


Was the console working before you started: Yes, still boots to stock dash if I flash the stock NAND and disconnect the 5v power line to the R-JTAG. Runs fine with games and such, even after everything was installed.


Jrunner Rater Log:

Code:
Phat Selected
Version: 10
Power Up
Waiting for POST to change
Post 52 - BRANCH 
Post 72 - INIT_BOOT_ANIMATION + XMADecoder & XAudioRender Init 
Post 52 - BRANCH 
Post 72 - INIT_BOOT_ANIMATION + XMADecoder & XAudioRender Init 
Post 52 - BRANCH 
Post 72 - INIT_BOOT_ANIMATION + XMADecoder & XAudioRender Init 
Post 52 - BRANCH 
Post 72 - INIT_BOOT_ANIMATION + XMADecoder & XAudioRender Init 
Post 52 - BRANCH 
Post 72 - INIT_BOOT_ANIMATION + XMADecoder & XAudioRender Init 
Post 52 - BRANCH 
Post 72 - INIT_BOOT_ANIMATION + XMADecoder & XAudioRender Init 
Post 52 - BRANCH 
Post 72 - INIT_BOOT_ANIMATION + XMADecoder & XAudioRender Init 
Post 52 - BRANCH 
Post 72 - INIT_BOOT_ANIMATION + XMADecoder & XAudioRender Init 
Post 52 - BRANCH 
Post 72 - INIT_BOOT_ANIMATION + XMADecoder & XAudioRender Init 
Post 52 - BRANCH 
Post 72 - INIT_BOOT_ANIMATION + XMADecoder & XAudioRender Init 
Post 52 - BRANCH 
Post 72 - INIT_BOOT_ANIMATION + XMADecoder & XAudioRender Init 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 70 - INIT_VIDEO_DRIVER 
Most Fails(cumulative): 0xA0
Shutdown

Updflash log:

Code:
base path changed to C:\Xbox360\Downloads\J-Runner v03 (1) Core Pack\J-Runner\xeBuild
---- { Image Build Mode } ----
building jtag image
<enter> key on completion suppressed
data directory overridden from command line to '16537\'
per build directory overridden from command line to 'data\'
file name overridden from command line to 'C:\Xbox360\Downloads\J-Runner v03 (1) Core Pack\J-Runner\042736680507\updflash.bin'


------ parsing user ini at 'data\options.ini' ------
loading file...done!
pre-parsing and sanitizing
done!
User options.ini loaded, 0x1b0 bytes in memory
loading cpukey.txt from data\cpukey.txt
CPU Key set to: 0xAE9AE6CE01A761049A53F48EA72FC660 (weight:0x35 valid; ecd: valid)
setting 1blkey from ini: 0xDD88AD0C9ED669E7B56794FB68563EFA
1BL Key set to: 0xDD88AD0C9ED669E7B56794FB68563EFA sum: 0x983 (expects: 0x983)
xex Key set to: 0x20B185A59D28FDC340583FBB0896BF91 sum: 0x800 (expects: 0x800)
Using patchsmc option (ini file)


------ parsing ini at '16537\_jtag.ini' ------
ini version 16537


ini: label [falconbl] found
found (1) 'cb_5770.bin' crc: 0x3279f0d5
found (2) 'cd_5770.bin' crc: 0xd04e8927
found (3) 'ce_1888.bin' crc: 0xff9b60df
found (4) 'cf_4532.bin' crc: 0xd28ef722
found (5) 'cg_4532.bin' crc: 0x2530f8ce
found (6) 'cb_5771.bin' crc: 0x859140f0
found (7) 'cd_8453.bin' crc: 0x25e0acd0
found (8) 'cf_16537.bin' crc: 0xd2f70347
found (9) 'cg_16537.bin' crc: 0xcf8a8c3c


ini: label [flashfs] found
found (1) 'aac.xexp' crc: 0x340f017f
found (2) 'bootanim.xex' crc: 0x1a64dd1c
found (3) 'createprofile.xex' crc: 0xbb5dfa34
found (4) 'dash.xex' crc: 0x40671195
found (5) 'deviceselector.xex' crc: 0xf80b066f
found (6) 'gamerprofile.xex' crc: 0xb55d0d4f
found (7) 'hud.xex' crc: 0xd1e27e82
found (8) 'huduiskin.xex' crc: 0x98c75ba1
found (9) 'mfgbootlauncher.xex' crc: 0x773ee67d
found (10) 'minimediaplayer.xex' crc: 0x0411007d
found (11) 'nomni.xexp' crc: 0x323c6e47
found (12) 'nomnifwk.xexp' crc: 0xbe5a4208
found (13) 'nomnifwm.xexp' crc: 0xc9c3f0e0
found (14) 'SegoeXbox-Light.xtt' crc: 0xe0ee6049
found (15) 'signin.xex' crc: 0x4dd243b2
found (16) 'updater.xex' crc: 0xe93cef2e
found (17) 'vk.xex' crc: 0xac383a80
found (18) 'xam.xex' crc: 0x18496d9a
found (19) 'xenonclatin.xtt' crc: 0xd5d17ff5
found (20) 'xenonclatin.xttp' crc: 0x7a507ad1
found (21) 'xenonjklatin.xtt' crc: 0xdde4a14c
found (22) 'xenonjklatin.xttp' crc: 0xe2adddfb
found (23) 'ximecore.xex' crc: 0xc558548c
found (24) 'ximedic.xex' crc: 0x1d992bfb
found (25) 'ximedic.xexp' crc: 0x4da51d92
found (26) '..\launch.xex' crc: 0x00000000
found (27) '..\lhelper.xex' crc: 0x00000000
found (28) '..\launch.ini' crc: 0x00000000


ini: label [security] found
found (1) 'crl.bin' crc: 0x00000000
found (2) 'dae.bin' crc: 0x00000000
found (3) 'extended.bin' crc: 0x00000000
found (4) 'secdata.bin' crc: 0x00000000
------ ini parsing completed ------


output name overridden to: C:\Xbox360\Downloads\J-Runner v03 (1) Core Pack\J-Runner\042736680507\updflash.bin


1BL RSA pub key file is not available, signature checks will not be performed
PIRS RSA pub key file is not available, signature checks will not be performed
MASTER RSA pub key file is not available, signature checks will not be performed


------ Checking data\nanddump.bin ------
data\nanddump.bin file size: 0x1080000
nanddump header checks passed OK!
Loading NAND dump (0x1080000 bytes)...done!
Detecting NAND controller type from dump data...
    NAND dump is from a small block machine
    NAND dump uses small block controller
parsing dump into user and spare...
done!
decrypting KeyVault at address 0x4000 of size 0x4000
keyvault decrypted OK, will use if no kv.bin is provided
decrypting SMC at address 0x1000 of size 0x3000
SMC decrypted OK, will use if no external smc.bin is provided
seeking smc config in dump...found at offset 0xf7c000! Using if no smc config is provided.
CF slot 0 decrypted ok LDV 0x0f Pairing: 0x2a54f0
CF slot 1 decrypted ok LDV 0x10 Pairing: 0x2a54f0
setting LDV from image to 16
setting pairing data from image to 0x2a54f0
pairing set to: 2a 54 f0
MobileB.dat found at page 0x4860, size 2048 (0x800) bytes
MobileC.dat found at page 0x3680, size 512 (0x200) bytes
MobileD.dat found at page 0x28e0, size 2048 (0x800) bytes
MobileE.dat found at page 0x4bc0, size 2048 (0x800) bytes
Statistics.settings found at page 0x7bc0, size 4096 (0x1000) bytes
seeking FSRoot...fsroot found at page 0x4040 raw offset 0x848400
seeking security files...
crl.bin found in sector 0x250 size 0xa00...verified! Will use if external file not found.
dae.bin found in sector 0x24d size 0x7090...verified! Will use if external file not found.
extended.bin found in sector 0x14c size 0x4000...verified! Will use if external file not found.
secdata.bin found in sector 0x24b size 0x400...verified! Will use if external file not found.
done!
Writing initial header to flash image


------ loading system update container ------
16537\su20076000_00000000 found, loading...done!
    Read 0xb34000 bytes to memory
checking integrity...
header seems valid, version 2.0.16537.0
header hash is OK, checking content hashes...
content hashes seem OK, everything looks good!
extracted SUPD\xboxupd.bin (0x7a010 bytes)
decrypting SUPD\xboxupd.bin\CF_16537.bin (0x4560 bytes)...done!
decrypting SUPD\xboxupd.bin\CG_16537.bin (0x75aa2 bytes)...done!


------ Loading bootloaders and required security files ------
could not read 16537\bin\payload.bin, using built in payload (0x200 bytes)
reading data\SMC.bin (0x3000 bytes)
reset smc load address to 0x1000 size 0x3000
reading data\kv.bin failed, using kv.bin from nand dump
reading .\common\cb_5770.bin (0x8e40 bytes)
loaded cb_5770.bin, could not check signature rsa key not present!
reading .\common\cd_5770.bin (0x56c0 bytes)
reading .\common\ce_1888.bin (0x5606a b pad 0x56070 b)
reading .\common\cf_4532.bin (0x44c0 bytes)
reading .\common\cg_4532.bin (0x2ef40 bytes)
extracted SUPD\xboxupd.bin\CF_16537.bin (0x4560 bytes)
extracted SUPD\xboxupd.bin\CG_16537.bin (0x75aa2 bytes)
could not read 16537\bin\freeboot.bin, using built in core (0xd30 bytes)
reading 16537\bin\patches_falcon.bin (0x9d4 bytes)
reading data\xell-2f.bin (0x40000 bytes)
reading .\common\cb_5771.bin (0x9340 bytes)
loaded cb_5771.bin, could not check signature rsa key not present!
reading .\common\cd_8453.bin (0x5780 bytes)
reading data\smc_config.bin failed, using smc_config.bin from nand dump
-------------------
checking smc_config
-------------------
extracting config
------------------
SMC config info:
------------------
Target temps: Cpu:  80øC Gpu:  75øC Edram:  78øC
Max temps   : Cpu: 100øC Gpu: 100øC Edram: 102øC
Cpu Fan     : (auto)
Gpu Fan     : (auto)
MAC Address : 00:1d:d8:08:4f:ca
AVRegion    : 0x00000100 (NTSC-M)
GameRegion  : 0x00ff (NTSC/US)
DVDRegion   : 1
resetKey    : ADLD
---------------------
Checking for smc config data patches
smc config was not patched
---------------------
done!


------ Patching boot reasons and options into flash header ------
    Patching header for xell power reason


------ Encrypting and finalizing bootloaders ------
Fuse CPU Key set to: 0xAE9AE6CE01A761049A53F48EA72FC660
Fuse CF LDV set to : 0xFFFFFFFFFFFFFFFF0000000000000000
encoding payload.bin size 0x200 (JTAG)
patching payload.bin to load size 0xd30 (0x34c reps)
encoding SMC.bin size 0x3000 (JTAG)
SMC checksum: a6ee8b80
unknown SMC found, type: Jasper v4.1(2.03)
jtag hack found in smc.bin!


******* WARNING: could not patch SMC reset limit!


encoding kv.bin size 0x4000 (JTAG)
decrypted keyvault has been set for reference
Master RSA pub not available, not checking hash
encoding cb_5770.bin size 0x8e40 (JTAG)
CB 5770 seq 0x01050018 type: 0x01 cseq: 0x05 allow: 0x0018
    expected fuses:
    fuseset 00: C0FFFFFFFFFFFFFF
    fuseset 01: 0F0F0F0F0F0F0FF0
    fuseset 02: 0000F00000000000 (sequence)
    fuseset 02: 000F000000000000 (allow cseq 4)
    fuseset 02: 0000F00000000000 (allow cseq 5)
encoding cd_5770.bin size 0x56c0 (JTAG)
encoding ce_1888.bin size 0x56070 (JTAG)
encoding cf_4532.bin size 0x44c0 (JTAG)
encoding cg_4532.bin size 0x2ef40 (JTAG)
encoding cf_16537.bin size 0x4560 (JTAG)
encoding cg_16537.bin size 0x75ab0 (JTAG)
encoding freeboot.bin size 0xd30 (JTAG)
patching freeboot.bin with with kernel version string '16537'
Boot options set:
    - console DVD eject button is being used to start xell 
    - alternate xell button disabled
encoding patches_falcon.bin size 0x9d8 (JTAG)
encoding fuses.bin size 0x60 (JTAG)
encoding xell-2f.bin size 0x40000 (JTAG)
encoding cb_5771.bin size 0x9340 (JTAG)
CB 5771 seq 0x01070058 type: 0x01 cseq: 0x07 allow: 0x0058
    expected fuses:
    fuseset 00: C0FFFFFFFFFFFFFF
    fuseset 01: 0F0F0F0F0F0F0FF0
    fuseset 02: 000000F000000000 (sequence)
    fuseset 02: 000F000000000000 (allow cseq 4)
    fuseset 02: 0000F00000000000 (allow cseq 5)
    fuseset 02: 000000F000000000 (allow cseq 7)
CBENC pairing set to: 2a 54 f0
encoding cd_8453.bin size 0x5780 (JTAG)


Virtual Fuses set to:
    fuseset 00: C0FFFFFFFFFFFFFF
    fuseset 01: 0F0F0F0F0F0F0FF0
    fuseset 02: 000000F000000000
    fuseset 03: AE9AE6CE01A76104
    fuseset 04: AE9AE6CE01A76104
    fuseset 05: 9A53F48EA72FC660
    fuseset 06: 9A53F48EA72FC660
    fuseset 07: FFFFFFFFFFFFFFFF
    fuseset 08: 0000000000000000
    fuseset 09: 0000000000000000
    fuseset 10: 0000000000000000
    fuseset 11: 0000000000000000
done!


------ Adding bootloaders to flash image ------
adding payload.bin at raw offset 0x00000200 len 0x200 (end 0x400)
adding SMC.bin at raw offset 0x00001000 len 0x3000 (end 0x4000)
adding kv.bin at raw offset 0x00004000 len 0x4000 (end 0x8000)
adding cb_5770.bin at raw offset 0x00008000 len 0x8e40 (end 0x10e40)
adding cd_5770.bin at raw offset 0x00010e40 len 0x56c0 (end 0x16500)
adding ce_1888.bin at raw offset 0x00016500 len 0x56070 (end 0x6c570)
adding cf_4532.bin at raw offset 0x00070000 len 0x44c0 (end 0x744c0)
adding cg_4532.bin at raw offset 0x000744c0 len 0x2ef40 (end 0x80000, rest in fs)
adding cf_16537.bin at raw offset 0x00080000 len 0x4560 (end 0x84560)
adding cg_16537.bin at raw offset 0x00084560 len 0x75ab0 (end 0x90000, rest in fs)
adding freeboot.bin at raw offset 0x00090000 len 0xd30 (end 0x90d30)
adding patches_falcon.bin at raw offset 0x00091000 len 0x9d8 (end 0x919d8)
adding fuses.bin at raw offset 0x00095000 len 0x60 (end 0x95060)
adding xell-2f.bin at raw offset 0x00095060 len 0x40000 (end 0xd5060)
adding cb_5771.bin at raw offset 0x000d5060 len 0x9340 (end 0xde3a0)
adding cd_8453.bin at raw offset 0x000de3a0 len 0x5780 (end 0xe3b20)
Fixing up FS table...done!
Writing zeropair CG patch slot overflow data to sysupdate.xexp1
    at raw offset 0xe4000 len 0x00023400 (end: 0x00107400)...done!
Writing target CG patch slot overflow data to sysupdate.xexp2
    at raw offset 0xe4000 len 0x0006a010 (end: 0x0014e010)...done!


------ adding 28 firmware files ------
extracted SUPD\aac.xexp (0x14000 bytes) (crc32: 0x340f017f ini: 0x340f017f)
    adding as aac.xexp2 at raw offset 0x172010 len 0x00014000 (end 0x00186010)
extracted SUPD\bootanim.xex (0x61000 bytes) (crc32: 0x1a64dd1c ini: 0x1a64dd1c)
    adding as bootanim.xex at raw offset 0x188000 len 0x00061000 (end 0x001e9000)
extracted SUPD\createprofile.xex (0xc000 bytes) (crc32: 0xbb5dfa34 ini: 0xbb5dfa34)
    adding as createprofile.xex at raw offset 0x1e9000 len 0x0000c000 (end 0x001f5000)
extracted SUPD\dash.xex (0x597000 bytes) (crc32: 0x40671195 ini: 0x40671195)
    adding as dash.xex at raw offset 0x1f8000 len 0x00597000 (end 0x0078f000)
extracted SUPD\deviceselector.xex (0xa000 bytes) (crc32: 0xf80b066f ini: 0xf80b066f)
    adding as deviceselector.xex at raw offset 0x78f000 len 0x0000a000 (end 0x00799000)
extracted SUPD\gamerprofile.xex (0x1b000 bytes) (crc32: 0xb55d0d4f ini: 0xb55d0d4f)
    adding as gamerprofile.xex at raw offset 0x79a000 len 0x0001b000 (end 0x007b5000)
extracted SUPD\hud.xex (0x1d000 bytes) (crc32: 0xd1e27e82 ini: 0xd1e27e82)
    adding as hud.xex at raw offset 0x7b7000 len 0x0001d000 (end 0x007d4000)
extracted SUPD\huduiskin.xex (0x14000 bytes) (crc32: 0x98c75ba1 ini: 0x98c75ba1)
    adding as huduiskin.xex at raw offset 0x7d5000 len 0x00014000 (end 0x007e9000)
extracted SUPD\mfgbootlauncher.xex (0x8000 bytes) (crc32: 0x773ee67d ini: 0x773ee67d)
    adding as mfgbootlauncher.xex at raw offset 0x7ec000 len 0x00008000 (end 0x007f4000)
extracted SUPD\minimediaplayer.xex (0xc000 bytes) (crc32: 0x0411007d ini: 0x0411007d)
    adding as minimediaplayer.xex at raw offset 0x7f4000 len 0x0000c000 (end 0x00800000)
extracted SUPD\nomni.xexp (0xc800 bytes) (crc32: 0x323c6e47 ini: 0x323c6e47)
    adding as nomni.xexp2 at raw offset 0x800000 len 0x0000c800 (end 0x0080c800)
extracted SUPD\nomnifwk.xexp (0x2000 bytes) (crc32: 0xbe5a4208 ini: 0xbe5a4208)
    adding as nomnifwk.xexp2 at raw offset 0x80c800 len 0x00002000 (end 0x0080e800)
extracted SUPD\nomnifwm.xexp (0x5000 bytes) (crc32: 0xc9c3f0e0 ini: 0xc9c3f0e0)
    adding as nomnifwm.xexp2 at raw offset 0x812000 len 0x00005000 (end 0x00817000)
extracted SUPD\SegoeXbox-Light.xtt (0x6000 bytes) (crc32: 0xe0ee6049 ini: 0xe0ee6049)
    adding as SegoeXbox-Light.xtt at raw offset 0x819000 len 0x00006000 (end 0x0081f000)
extracted SUPD\signin.xex (0x19000 bytes) (crc32: 0x4dd243b2 ini: 0x4dd243b2)
    adding as signin.xex at raw offset 0x822000 len 0x00019000 (end 0x0083b000)
extracted SUPD\updater.xex (0x7000 bytes) (crc32: 0xe93cef2e ini: 0xe93cef2e)
    adding as updater.xex at raw offset 0x83d000 len 0x00007000 (end 0x00844000)
extracted SUPD\vk.xex (0xb000 bytes) (crc32: 0xac383a80 ini: 0xac383a80)
    adding as vk.xex at raw offset 0x847000 len 0x0000b000 (end 0x00852000)
extracted SUPD\xam.xex (0x253000 bytes) (crc32: 0x18496d9a ini: 0x18496d9a)
    adding as xam.xex at raw offset 0x853000 len 0x00253000 (end 0x00aa6000)
extracted nanddump\xenonclatin.xtt (0x11b000 bytes) (crc32: 0xd5d17ff5 ini: 0xd5d17ff5)
    adding as xenonclatin.xtt at raw offset 0xaa7000 len 0x0011b000 (end 0x00bc2000)
extracted SUPD\xenonclatin.xttp (0x18000 bytes) (crc32: 0x7a507ad1 ini: 0x7a507ad1)
    adding as xenonclatin.xttp2 at raw offset 0xbc3000 len 0x00018000 (end 0x00bdb000)
extracted nanddump\xenonjklatin.xtt (0x1a8000 bytes) (crc32: 0xdde4a14c ini: 0xdde4a14c)
    adding as xenonjklatin.xtt at raw offset 0xbdc000 len 0x001a8000 (end 0x00d84000)
extracted SUPD\xenonjklatin.xttp (0x7000 bytes) (crc32: 0xe2adddfb ini: 0xe2adddfb)
    adding as xenonjklatin.xttp2 at raw offset 0xd84000 len 0x00007000 (end 0x00d8b000)
extracted SUPD\ximecore.xex (0x17000 bytes) (crc32: 0xc558548c ini: 0xc558548c)
    adding as ximecore.xex at raw offset 0xd8b000 len 0x00017000 (end 0x00da2000)
extracted nanddump\ximedic.xex (0x90000 bytes) (crc32: 0x1d992bfb ini: 0x1d992bfb)
    adding as ximedic.xex at raw offset 0xda3000 len 0x00090000 (end 0x00e33000)
extracted SUPD\ximedic.xexp (0x2800 bytes) (crc32: 0x4da51d92 ini: 0x4da51d92)
    adding as ximedic.xexp2 at raw offset 0xe34000 len 0x00002800 (end 0x00e36800)
reading 16537\..\launch.xex (0xc800 bytes)
    adding as launch.xex at raw offset 0xe36800 len 0x0000c800 (end 0x00e43000)
reading 16537\..\lhelper.xex (0x6000 bytes)
    adding as lhelper.xex at raw offset 0xe44800 len 0x00006000 (end 0x00e4a800)
reading 16537\..\launch.ini (0x1c3 bytes)
    adding as launch.ini at raw offset 0xe4e000 len 0x000001c3 (end 0x00e4e1c3)


------ adding 4 security files ------
<- Processing crl.bin ->
reading data\crl.bin (0xa00 bytes)
crl appears crypted, attempting to decrypt with CPU key...failed! Trying alternate key...success!
    adding as crl.bin at raw offset 0xe54000 len 0x00000a00 (end 0x00e54a00)


<- Processing dae.bin ->
reading data\dae.bin (0xad30 bytes)
dae appears encrypted, attempting to decrypt with CPU key...failed! Attempting to decrypt with alternate key...
success!
    adding as dae.bin at raw offset 0xe58000 len 0x0000ad30 (end 0x00e62d30)


<- Processing extended.bin ->
reading data\extended.bin (0x4000 bytes)
    adding as extended.bin at raw offset 0xe64000 len 0x00004000 (end 0x00e68000)


<- Processing secdata.bin ->
reading data\secdata.bin (0x400 bytes)
    adding as secdata.bin at raw offset 0xe68000 len 0x00000400 (end 0x00e68400)


------ checking for Mobile*.dat ------
MobileB.dat found, adding from previous parse
    adding MobileB.dat as type 0x31 at raw offset 0xe6c000 len 0x800 (end 0xe6c800)
MobileC.dat found, adding from previous parse
    adding MobileC.dat as type 0x32 at raw offset 0xe70000 len 0x200 (end 0xe70200)
MobileD.dat found, adding from previous parse
    adding MobileD.dat as type 0x33 at raw offset 0xe74000 len 0x800 (end 0xe74800)
MobileE.dat found, adding from previous parse
    adding MobileE.dat as type 0x34 at raw offset 0xe78000 len 0x800 (end 0xe78800)
Statistics.settings found, adding from previous parse
    adding Statistics.settings at raw offset 0xf78000 len 0x1000 (end 0xf79000)


------ adding smc_config.bin ------
adding smc config to offset 0x00f7c000, len 0x400


------ finalizing image ------
Fixing up empty FS block entries...done!
Writing FS table to image offset 0xe7c000 len 0x4000 (end 0xe80000)...done!
calculating ECD bytes and assembling raw image...done!
done remapping!


------ writing image to disk ------
writing file 'C:\Xbox360\Downloads\J-Runner v03 (1) Core Pack\J-Runner\042736680507\updflash.bin' to disk...done!
---------------------------------------------------------------
C:\Xbox360\Downloads\J-Runner v03 (1) Core Pack\J-Runner\042736680507\updflash.bin image built, info:
---------------------------------------------------------------
Kernel    : 2.0.16537.0
Console   : Falcon
NAND size : 16MiB
Build     : JTAG
Xell      : power on console with console eject button
Serial    : 042736680507
ConsoleId : 003193140719
MoboSerial: 8394543209798057
Mfg Date  : 01/30/2008
CPU Key   : AE9AE6CE01A761049A53F48EA72FC660
1BL Key   : DD88AD0C9ED669E7B56794FB68563EFA
DVD Key   : DC297B06935E81D570752869CBC332C3
CF LDV    : 16
KV type   : type2 (hashed - unchecked, master key not available)
---------------------------------------------------------------
    xeBuild Finished. Have a nice day.
---------------------------------------------------------------
 

Attachments

Scrufdog

VIP Member
Jun 12, 2011
374
0
Baltimore, MD
If it helps, when I flash the stock NAND and remove the power wire for the chip, I leave the jtag Qsb set to on and it boots fine.
 

gavin_darkglide

VIP Member
Dec 14, 2012
2,303
118
I had a falcon when r-jtag first came out that did this...... Never did figure out why, but i think if your wiring is good, and it still isnt glitching it is cpu related. though i find it weird that rgh2 would work.
 
Last edited:

Scrufdog

VIP Member
Jun 12, 2011
374
0
Baltimore, MD
Try to change from 1v2 to 1v8 or try also leaving it opened.
As stated in the first post I have tried all 18 combinations, meaning DIP 1-6, on all 3 voltages.

Put dip switches 5 & 7 ON with the rest OFF and post the RATER log please (let it run three or four times first).
The rater log from the first post was 5 and 7 on, at 1.8V. Here's one with 5 and 7 on at 0v. It ends at the 0010, then I have to click STOP, and it sends the Shutdown command.

Code:
Slim Selected
Version: 10
Power Up
Waiting for POST to change
Post 52 - BRANCH 
Post 72 - INIT_BOOT_ANIMATION + XMADecoder & XAudioRender Init 
Post 52 - BRANCH 
Post 72 - INIT_BOOT_ANIMATION + XMADecoder & XAudioRender Init 
Post 52 - BRANCH 
Post 72 - INIT_BOOT_ANIMATION + XMADecoder & XAudioRender Init 
Post 52 - BRANCH 
Post 72 - INIT_BOOT_ANIMATION + XMADecoder & XAudioRender Init 
Post 52 - BRANCH 
Post 72 - INIT_BOOT_ANIMATION + XMADecoder & XAudioRender Init 
Post 52 - BRANCH 
Post 72 - INIT_BOOT_ANIMATION + XMADecoder & XAudioRender Init 
Post 52 - BRANCH 
Post 72 - INIT_BOOT_ANIMATION + XMADecoder & XAudioRender Init 
Post 52 - BRANCH 
Post 72 - INIT_BOOT_ANIMATION + XMADecoder & XAudioRender Init 
Post 52 - BRANCH 
Post 72 - INIT_BOOT_ANIMATION + XMADecoder & XAudioRender Init 
Post 52 - BRANCH 
Post 72 - INIT_BOOT_ANIMATION + XMADecoder & XAudioRender Init 
Post 52 - BRANCH 
Post 72 - INIT_BOOT_ANIMATION + XMADecoder & XAudioRender Init 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 20 - CB entry point reached 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 20 - CB entry point reached 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 20 - CB entry point reached 
Post 20 - CB entry point reached 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 20 - CB entry point reached 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 20 - CB entry point reached 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 20 - CB entry point reached 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 70 - INIT_VIDEO_DRIVER
Shutdown
 
Last edited:

Scrufdog

VIP Member
Jun 12, 2011
374
0
Baltimore, MD
I dug around a little a found one post where someone said that they would get a 0010 with different settings on the Jtag QSB. Unless someone else comes up with something, I'll play with that if I have time tonight when I get home. If that doesnt work, I'll start over without the AUD_CLAMP setup, and write a new NAND to match.
 

Scrufdog

VIP Member
Jun 12, 2011
374
0
Baltimore, MD
yeah, I'm currently reading all the posts I can while I have a moment and I read that somewhere. I'm not seeing a POST 10 in my Rater logs, so I'll check resistance on the POST OUT points when I get home. They look good, but maybe one has a bad joint.
 

Scrufdog

VIP Member
Jun 12, 2011
374
0
Baltimore, MD
all my POST OUT points measure between 121K to 129K, each point a little different. No points shorted out. Check Stby_Clk to resistor on board, 0 ohms on one side, 33 ohms on the other, so thats good.

Here my Rater log at 1.2v DIP 5,7 ON

Code:
Phat Selected
Version: 10
Power Up
Waiting for POST to change
Post 52 - BRANCH 
Post 7E 
Post 56 
Post 76 - INIT_SYSTEM_ROOT 
Post 56 
Post 76 - INIT_SYSTEM_ROOT 
Post 56 
Post 7E 
Post 56 
Post 76 - INIT_SYSTEM_ROOT 
Post 56 
Post 7E 
Post 56 
Post 7E 
Post 56 
Post 76 - INIT_SYSTEM_ROOT 
Post 56 
Post 7E 
Post 56 
Post 76 - INIT_SYSTEM_ROOT 
Post 56 
Post 76 - INIT_SYSTEM_ROOT 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post 86 - Panic - EXTERNAL 
Post FE 
Post 86 - Panic - EXTERNAL 
Post FE 
Post 82 - Panic - DATA_STORAGE 
Post FE 
Post 82 - Panic - DATA_STORAGE 
Post FE 
Post 82 - Panic - DATA_STORAGE 
Post 86 - Panic - EXTERNAL 
Post 82 - Panic - DATA_STORAGE 
Post FE 
Post 82 - Panic - DATA_STORAGE 
Post FE 
Post 82 - Panic - DATA_STORAGE 
Post FE 
Post FE 
Post 82 - Panic - DATA_STORAGE 
Post 86 - Panic - EXTERNAL 
Post 82 - Panic - DATA_STORAGE 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post FE 
Post 82 - Panic - DATA_STORAGE 
Post FE 
Post 82 - Panic - DATA_STORAGE 
Post 86 - Panic - EXTERNAL 
Post FE 
Post 82 - Panic - DATA_STORAGE 
Post 82 - Panic - DATA_STORAGE 
Post FE 
Post 82 - Panic - DATA_STORAGE 
Post 86 - Panic - EXTERNAL 
Post 82 - Panic - DATA_STORAGE 
Post FE 
Post 82 - Panic - DATA_STORAGE 
Post FE 
Post 82 - Panic - DATA_STORAGE 
Post 86 - Panic - EXTERNAL 
Post 82 - Panic - DATA_STORAGE 
Post 82 - Panic - DATA_STORAGE 
Post FE 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post FE 
Post 86 - Panic - EXTERNAL 
Post 82 - Panic - DATA_STORAGE 
Post FE 
Post 82 - Panic - DATA_STORAGE 
Post FE 
Post 82 - Panic - DATA_STORAGE 
Post FE 
Post 82 - Panic - DATA_STORAGE 
Post FE 
Post 82 - Panic - DATA_STORAGE 
Post FE 
Post 82 - Panic - DATA_STORAGE 
Post FE 
Post FE 
Post 82 - Panic - DATA_STORAGE 
Post FE 
Post 86 - Panic - EXTERNAL 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post F8 
Post 84 - Panic - INSTRUCTION_STORAGE 
Post 86 - Panic - EXTERNAL 
Post 82 - Panic - DATA_STORAGE 
Post FE 
Post 86 - Panic - EXTERNAL 
Post FE 
Post 82 - Panic - DATA_STORAGE 
Post FE 
Post FE 
Post 82 - Panic - DATA_STORAGE 
Post 86 - Panic - EXTERNAL 
Post 82 - Panic - DATA_STORAGE 
Post 86 - Panic - EXTERNAL 
Post 82 - Panic - DATA_STORAGE 
Post FE 
Post 82 - Panic - DATA_STORAGE 
Post FE 
Post 82 - Panic - DATA_STORAGE 
Post 86 - Panic - EXTERNAL 
Post FE 
Post 82 - Panic - DATA_STORAGE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 86 - Panic - EXTERNAL 
Post FE 
Post 86 - Panic - EXTERNAL 
Post 82 - Panic - DATA_STORAGE 
Post FE 
Post 82 - Panic - DATA_STORAGE 
Post FE 
Post FE 
Post 82 - Panic - DATA_STORAGE 
Post FE 
Post 86 - Panic - EXTERNAL 
Post 82 - Panic - DATA_STORAGE 
Post 82 - Panic - DATA_STORAGE 
Post FE 
Post 82 - Panic - DATA_STORAGE 
Post FE 
Post 82 - Panic - DATA_STORAGE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post FE 
Post 86 - Panic - EXTERNAL 
Post FE 
Post 86 - Panic - EXTERNAL 
Post FE 
Post 86 - Panic - EXTERNAL 
Post FE 
Post 82 - Panic - DATA_STORAGE 
Post FE 
Post 82 - Panic - DATA_STORAGE 
Post FE 
Post 82 - Panic - DATA_STORAGE 
Post FE 
Post 86 - Panic - EXTERNAL 
Post 82 - Panic - DATA_STORAGE 
Post 86 - Panic - EXTERNAL 
Post FE 
Post 86 - Panic - EXTERNAL 
Post 82 - Panic - DATA_STORAGE 
Post 86 - Panic - EXTERNAL 
Post FE 
Post 82 - Panic - DATA_STORAGE 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Most Fails(cumulative): 0xA0
Shutdown

Here's Rater at 1.8v, Dips 5,7 ON. This particular run ended with a 0010

Code:
Phat Selected
Version: 10
Power Up
Waiting for POST to change
Post 52 - BRANCH 
Post 12 - FSB_CONFIG_RX_STATE 
Post 52 - BRANCH 
Post 12 - FSB_CONFIG_RX_STATE 
Post 52 - BRANCH 
Post 12 - FSB_CONFIG_RX_STATE 
Post 52 - BRANCH 
Post 12 - FSB_CONFIG_RX_STATE 
Post 52 - BRANCH 
Post 12 - FSB_CONFIG_RX_STATE 
Post 52 - BRANCH 
Post 12 - FSB_CONFIG_RX_STATE 
Post 52 - BRANCH 
Post 12 - FSB_CONFIG_RX_STATE 
Post 52 - BRANCH 
Post 12 - FSB_CONFIG_RX_STATE 
Post 52 - BRANCH 
Post 12 - FSB_CONFIG_RX_STATE 
Post 52 - BRANCH 
Post 12 - FSB_CONFIG_RX_STATE 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 20 - CB entry point reached 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 20 - CB entry point reached 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 20 - CB entry point reached 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 20 - CB entry point reached 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 20 - CB entry point reached 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 13 - FSB_CONFIG_TX_STATE 
Post 15 - FETCH_OFFSET 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Most Fails(cumulative): 0xA0
Shutdown
 

Scrufdog

VIP Member
Jun 12, 2011
374
0
Baltimore, MD
Interestingly enough the console wont quit to RRod 0010 if the DVD Rom is unplugged.
 

Scrufdog

VIP Member
Jun 12, 2011
374
0
Baltimore, MD
there is a brief pause. I can try to get a video if that would help. Wouldnt be for a few hours though. Getting ready to head out.
 

Scrufdog

VIP Member
Jun 12, 2011
374
0
Baltimore, MD
ok, will try that tonight.
 

Scrufdog

VIP Member
Jun 12, 2011
374
0
Baltimore, MD
The pause is actually at the A0 Panic, with or without the F wire. Both Raters are exactly the same, hence no point in me through the Rater log up here.
 

mrdrifta

VIP Member
Jan 31, 2011
325
0
New Zealand
try the default voltage DIP settings for falcon (Say DIPS 5,7 ON) and post a log (this usually gives a cleaner POST log - for me atleast. Also make sure your E and F are around the right way. I installed an Rjtag chip next to CPU heatsink and had the same problem until i realized i had e and f around the wrong way!
 

Scrufdog

VIP Member
Jun 12, 2011
374
0
Baltimore, MD
try the default voltage DIP settings for falcon (Say DIPS 5,7 ON) and post a log (this usually gives a cleaner POST log - for me atleast. Also make sure your E and F are around the right way. I installed an Rjtag chip next to CPU heatsink and had the same problem until i realized i had e and f around the wrong way!
The rater log is post #6 is 0v, DIPS 5,7. E ad F wires are good.
 

Scrufdog

VIP Member
Jun 12, 2011
374
0
Baltimore, MD
I have a station, I already warned my buddy about that. Seems to be the only option left.