TRINITY slim will not glitch what am i missing? :(

[cyb3rbrute]

Hey guys I'm having trouble with my Trinity board it just wont glitch maybe i missed something. Just got my CR4 XL and jumped right into it using Ubergeek's guide (thanx Uber) I've done many rev c phat installs in the past this is my first slim rgh2, i double checked my solder joints all seems fine to me dumped the nand couple times like usual, compared, built/written ECC all went smooth. debug blinks for ever no go any ideas?

Thanks!

JR log:

===================================================Wednesday, December 3, 2014 7:58:16 PM


J-Runner v0.3 Beta (6) Started






Checking Files
Finished Checking Files
Checking Console..
Version: 03
Flash Config: 0x00023010
00023010
Trinity, Jasper 16MB
CB Version: 9188
Trinity
Version: 03
Flash Config: 0x00023010
00023010
Trinity, Jasper 16MB
CB Version: 9188
Trinity
Reading Nand to C:\Users\neo.ThinkPad\Desktop\J-Runner\output\nanddump1.bin
Reading Nand
Done!
in 2:09 min:sec


Reading Nand to C:\Users\neo.ThinkPad\Desktop\J-Runner\output\nanddump2.bin
Initializing nanddump1.bin..
Reading Nand
Trinity
RGH2 Selected
Nand Initialization Finished
Done!
in 2:10 min:sec


Comparing...
Nands are the same
CR4 Selected
* unpacking flash image, ....
Spare Data found, will remove.
Removed
* found decrypted CD
* found XeLL binary, must be linked to 0x1c000000
 * we found the following parts: 
SMC: 3.1
CB_A: 9188
CB_B: 9188
CD (image): 9452
CD (decrypted): 8453
 * this image will be valid *only* for: trinity (slim)
 * patching SMC...
Patching Trinity version 3.1 SMC at offset 0x13B3
 * patching CB_B...
patchset for 9188 found, 4 patch(es)
 * constructing new image...
 * base size: 70000
 * No separate recovery Xell available!
 * Flash Layout:
0x0..0x1FF (0x200 bytes) Header
0x200..0xFFF (0xE00 bytes) Padding
0x1000..0x3FFF (0x3000 bytes) SMC
0x4000..0x7FFF (0x4000 bytes) Keyvault
0x8000..0x9ABF (0x1AC0 bytes) CB_A 9188
0x9AC0..0x112BF (0x7800 bytes) CB_B 9188
0x112C0..0x172BF (0x6000 bytes) CD 8453
0x172C0..0xBFFFF (0xA8D40 bytes) Padding
0xC0000..0xFFFFF (0x40000 bytes) Xell (backup)
0x100000..0x13FFFF (0x40000 bytes) Xell (main)
 * Encoding ECC...Done!
------------- Written into output\image_00000000.ecc


Version: 03
Flash Config: 0x00023010
Writing Nand
image_00000000.ecc
Done!
in 0:09 min:sec

pics:


http://pho.to/89GMB

 

[chase]

have you tried other dip switches?

can you post rater ?

can you post jrunner log ?

also, can you try the ecc from the "magic files" pack

 

[nofeloniesyet]

if your using the default dips,try 3 only.ive had a few stubborn trinitys now that this seeeeeemed to be the center on. also make sure cr4 is checked in jrunner when building the image.might of already been done but since you posted no jrunner logs thought id mention it.

 

[cyb3rbrute]

Thanks for the advice guys added J-runenr log. will try other dips/magic files and post update in a bit.

 

[BL4K3Y]

Dip switch 3 is the center timing for Trinity and Corona boards.

Set this to ON with the rest OFF and cut your yellow and blue wires as short as possible.

 

[cyb3rbrute]

Almost gave up on this board.. i got some more free time to work on it today and i decided to updated to the latest retail dash (didn't mess with the install wiring) wrote ecc with new nand dump and bam! glitched in a few tries, i guess it was some weird issue with the earlier dash it was on...