- Console Type: falcon 2
- RGH2+
- Programmers Used: NAND-X, JRP v2.0
- NAND Size: 16
- Dashboard version: 16747
- CB Version: 5772
- J-Runner log- See below
- updflash.bin log: below
- Was the console working before you started: Yes
- Do you get a green debug light appear on the CR4 XL chip every 4-5 seconds: Yes
- How long is the light on for each time: normal
I have a weird one here, it boots xell fine, but won't boot the image. It stops at post 2D every time midway through bootup after successful glitch. It works fine on retail, and I can rarely make the image boot up but won't go past boot anim.. Using RGH2+, and default settings. I have already tried the smc power control value edits that Alex discovered, no dice. I'm a bit stumped, let me know what suggestions you have. Would like to have this sorted asap, console is for a customer that needs this back asap for Christmas.
Here are my build logs and rater logs and screenshots:
updflash:
Code:
base path changed to C:\Users\Dr. Logan\Desktop\J-Runner v02 Beta (284) Core Pack\xeBuild
---- { Image Build Mode } ----
building glitch2 image
<enter> key on completion suppressed
data directory overridden from command line to '16747\'
per build directory overridden from command line to 'data\'
file name overridden from command line to 'C:\Users\Dr. Logan\Desktop\J-Runner v02 Beta (284) Core Pack\328551483605\updflash.bin'
------ parsing user ini at 'data\options.ini' ------
loading file...done!
pre-parsing and sanitizing
done!
User options.ini loaded, 0x1a0 bytes in memory
loading cpukey.txt from data\cpukey.txt
CPU Key set to: 0x5046EF5C549431D9D8EB6B45B1461FF0 (weight:0x35 valid; ecd: valid)
setting 1blkey from ini: 0xDD88AD0C9ED669E7B56794FB68563EFA
1BL Key set to : 0xDD88AD0C9ED669E7B56794FB68563EFA sum: 0x983 (expects: 0x983)
xex Key set to : 0x20B185A59D28FDC340583FBB0896BF91 sum: 0x800 (expects: 0x800)
Using patchsmc option (ini file)
------ parsing ini at '16747\_glitch2.ini' ------
ini version 16747
ini: label [falconbl] found
found (1) 'cba_5772.bin' crc: 0xe3696f7e
found (2) 'cbb_5772.bin' crc: 0xfb5ab9a4
found (3) 'cd_9452.bin' crc: 0x455fa02c
found (4) 'ce_1888.bin' crc: 0xff9b60df
found (5) 'cf_16747.bin' crc: 0x94a4ef68
found (6) 'cg_16747.bin' crc: 0x88e1e9b9
ini dictates dual CB for this model
ini: label [flashfs] found
found (1) 'aac.xexp' crc: 0x12d353e9
found (2) 'bootanim.xex' crc: 0x151b0618
found (3) 'createprofile.xex' crc: 0x32ceed5a
found (4) 'dash.xex' crc: 0x4103a319
found (5) 'deviceselector.xex' crc: 0xfe497738
found (6) 'gamerprofile.xex' crc: 0xef9022d5
found (7) 'hud.xex' crc: 0xc0e76e31
found (8) 'huduiskin.xex' crc: 0x155495d3
found (9) 'mfgbootlauncher.xex' crc: 0xdecbab8e
found (10) 'minimediaplayer.xex' crc: 0x2892b8d5
found (11) 'nomni.xexp' crc: 0xdcef767a
found (12) 'nomnifwk.xexp' crc: 0x0d14c998
found (13) 'nomnifwm.xexp' crc: 0xdc46bb6e
found (14) 'SegoeXbox-Light.xtt' crc: 0xe0ee6049
found (15) 'signin.xex' crc: 0xcbfce61f
found (16) 'updater.xex' crc: 0xafef5cf0
found (17) 'vk.xex' crc: 0xf2caff49
found (18) 'xam.xex' crc: 0x79f6eabf
found (19) 'xenonclatin.xtt' crc: 0xd5d17ff5
found (20) 'xenonclatin.xttp' crc: 0x7a507ad1
found (21) 'xenonjklatin.xtt' crc: 0xdde4a14c
found (22) 'xenonjklatin.xttp' crc: 0xe2adddfb
found (23) 'ximecore.xex' crc: 0x4c2f6bd1
found (24) 'ximedic.xex' crc: 0x1d992bfb
found (25) 'ximedic.xexp' crc: 0x34c9b084
found (26) '..\launch.xex' crc: 0x00000000
found (27) '..\lhelper.xex' crc: 0x00000000
found (28) '..\launch.ini' crc: 0x00000000
ini: label [security] found
found (1) 'crl.bin' crc: 0x00000000
found (2) 'dae.bin' crc: 0x00000000
found (3) 'extended.bin' crc: 0x00000000
found (4) 'fcrt.bin' crc: 0x00000000
found (5) 'secdata.bin' crc: 0x00000000
------ ini parsing completed ------
output name overridden to: C:\Users\Dr. Logan\Desktop\J-Runner v02 Beta (284) Core Pack\328551483605\updflash.bin
1BL RSA pub key file is not available, signature checks will not be performed
PIRS RSA pub key file is not available, signature checks will not be performed
MASTER RSA pub key file is not available, signature checks will not be performed
------ Checking data\nanddump.bin ------
data\nanddump.bin file size: 0x1080000
nanddump header checks passed OK!
Loading NAND dump (0x1080000 bytes)...done!
Detecting NAND controller type from dump data...
NAND dump is from a small block machine
NAND dump uses small block controller
parsing dump into user and spare...
done!
decrypting KeyVault at address 0x4000 of size 0x4000
keyvault decrypted OK, will use if no kv.bin is provided
decrypting SMC at address 0x1000 of size 0x3000
SMC decrypted OK, will use if no external smc.bin is provided
seeking smc config in dump...found at offset 0xf7c000! Using if no smc config is provided.
CF slot 0 decrypted ok LDV 0x0d Pairing: 0xea78b0
CF slot 1 decrypted ok LDV 0x0e Pairing: 0xea78b0
setting LDV from image to 14
setting pairing data from image to 0xea78b0
pairing set to: ea 78 b0
MobileB.dat found at block 0x1f2, page 0x10 (page 0x3e50), size 2048 (0x800) bytes
MobileC.dat found at block 0x346, page 0x0 (page 0x68c0), size 512 (0x200) bytes
MobileD.dat found at block 0x188, page 0x0 (page 0x3100), size 2048 (0x800) bytes
MobileE.dat found at block 0x1e1, page 0x4 (page 0x3c24), size 2048 (0x800) bytes
Statistics.settings found at page 0x7bc0, size 4096 (0x1000) bytes
seeking FSRoot...fsroot found at block 0xa9, page 0x0 (page 0x1520) raw offset 0x1520
seeking security files...
crl.bin found in sector 0x10a size 0xa00...verified! Will use if external file not found.
dae.bin found in sector 0x105 size 0xde60...verified! Will use if external file not found.
extended.bin found in sector 0x1a8 size 0x4000...verified! Will use if external file not found.
secdata.bin found in sector 0xa8 size 0x400...verified! Will use if external file not found.
done!
Writing initial header to flash image
------ loading system update container ------
16747\su20076000_00000000 found, loading...done!
Read 0xb35000 bytes to memory
checking integrity...
header seems valid, version 2.0.16747.0
header hash is OK, checking content hashes...
content hashes seem OK, everything looks good!
extracted SUPD\xboxupd.bin (0x7a010 bytes)
decrypting SUPD\xboxupd.bin\CF_16747.bin (0x4560 bytes)...done!
decrypting SUPD\xboxupd.bin\CG_16747.bin (0x75aaa bytes)...done!
------ Loading bootloaders and required security files ------
reading data\SMC.bin (0x3000 bytes)
reset smc load address to 0x1000 size 0x3000
reading data\kv.bin failed, using kv.bin from nand dump
reading .\common\cba_5772.bin (0x1ac0 bytes)
loaded cba_5772.bin, could not check signature rsa key not present!
reading .\common\cbb_5772.bin (0x9350 bytes)
reading .\common\cd_9452.bin (0x4f20 bytes)
reading .\common\ce_1888.bin (0x5606a b pad 0x56070 b)
reading data\xell-gggggg.bin (0x40000 bytes)
extracted SUPD\xboxupd.bin\CF_16747.bin (0x4560 bytes)
extracted SUPD\xboxupd.bin\CG_16747.bin (0x75aaa bytes)
reading 16747\bin\patches_g2falcon.bin (0x8c8 bytes)
reading data\smc_config.bin failed, using smc_config.bin from nand dump
-------------------
checking smc_config
-------------------
extracting config
------------------
SMC config info:
------------------
Target temps: Cpu: 80øC Gpu: 75øC Edram: 78øC
Max temps : Cpu: 100øC Gpu: 100øC Edram: 102øC
Cpu Fan : (auto)
Gpu Fan : (auto)
MAC Address : 00:1d:d8:8c:bf:22
AVRegion : 0x00000100 (NTSC-M)
GameRegion : 0x00ff (NTSC/US)
DVDRegion : 1
resetKey : XLRL
---------------------
Checking for smc config data patches
smc config was not patched
---------------------
could not check signature of cba_5772.bin, 1BL RSA key not present!
done!
patch slot offset reset to: 0xb0000
------ Patching BLs and modifying patches ------
Patching BLs...Done!
------ Patching boot reasons and options into flash header ------
Patching header for xell power reason
------ Encrypting and finalizing bootloaders ------
encoding SMC.bin size 0x3000
SMC checksum: 45ebe68a
unknown SMC found, type: Falcon v3.1(1.06)
glitch hack found in SMC binary!
encoding kv.bin size 0x4000
decrypted keyvault has been set for reference
Master RSA pub not available, not checking hash
encoding cba_5772.bin size 0x1ac0
encoding cbb_5772.bin size 0x9350
CB 5772 seq 0x010800d8 type: 0x01 cseq: 0x08 allow: 0x00d8
expected fuses:
fuseset 00: C0FFFFFFFFFFFFFF
fuseset 01: 0F0F0F0F0F0F0FF0 (retail)
fuseset 02: 0000000F00000000 (sequence)
fuseset 02: 000F000000000000 (allow cseq 4)
fuseset 02: 0000F00000000000 (allow cseq 5)
fuseset 02: 000000F000000000 (allow cseq 7)
fuseset 02: 0000000F00000000 (allow cseq 8)
**dual CB flag detected!**
encoding cd_9452.bin size 0x5290
encoding ce_1888.bin size 0x56070
encoding xell-gggggg.bin size 0x40000
encoding cf_16747.bin size 0x4560
encoding cg_16747.bin size 0x75ab0
encoding patches_g2falcon.bin size 0x4fc
done!
------ Adding bootloaders to flash image ------
adding SMC.bin at raw offset 0x00001000 len 0x3000 (end 0x4000)
adding kv.bin at raw offset 0x00004000 len 0x4000 (end 0x8000)
adding cba_5772.bin at raw offset 0x00008000 len 0x1ac0 (end 0x9ac0)
adding cbb_5772.bin at raw offset 0x00009ac0 len 0x9350 (end 0x12e10)
adding cd_9452.bin at raw offset 0x00012e10 len 0x5290 (end 0x180a0)
adding ce_1888.bin at raw offset 0x000180a0 len 0x56070 (end 0x6e110)
adding xell-gggggg.bin at raw offset 0x00070000 len 0x40000 (end 0xb0000)
adding cf_16747.bin at raw offset 0x000b0000 len 0x4560 (end 0xb4560)
adding cg_16747.bin at raw offset 0x000b4560 len 0x75ab0 (end 0xc0000, rest in fs)
adding patches_g2falcon.bin at raw offset 0x000c0010 len 0x4fc (end 0xc050c)
Fixing up FS table...done!
Writing zeropair CG patch slot overflow data to sysupdate.xexp1
at raw offset 0xd0000 len 0x0006a010 (end: 0x0013a010)...done!
------ adding 28 firmware files ------
extracted SUPD\aac.xexp (0x14000 bytes) (crc32: 0x12d353e9 ini: 0x12d353e9)
adding as aac.xexp1 at raw offset 0x13a010 len 0x00014000 (end 0x0014e010)
extracted SUPD\bootanim.xex (0x61000 bytes) (crc32: 0x151b0618 ini: 0x151b0618)
adding as bootanim.xex at raw offset 0x150000 len 0x00061000 (end 0x001b1000)
extracted SUPD\createprofile.xex (0xc000 bytes) (crc32: 0x32ceed5a ini: 0x32ceed5a)
adding as createprofile.xex at raw offset 0x1b1000 len 0x0000c000 (end 0x001bd000)
extracted SUPD\dash.xex (0x598000 bytes) (crc32: 0x4103a319 ini: 0x4103a319)
adding as dash.xex at raw offset 0x1c0000 len 0x00598000 (end 0x00758000)
extracted SUPD\deviceselector.xex (0xa000 bytes) (crc32: 0xfe497738 ini: 0xfe497738)
adding as deviceselector.xex at raw offset 0x758000 len 0x0000a000 (end 0x00762000)
extracted SUPD\gamerprofile.xex (0x1b000 bytes) (crc32: 0xef9022d5 ini: 0xef9022d5)
adding as gamerprofile.xex at raw offset 0x762000 len 0x0001b000 (end 0x0077d000)
extracted SUPD\hud.xex (0x1d000 bytes) (crc32: 0xc0e76e31 ini: 0xc0e76e31)
adding as hud.xex at raw offset 0x77f000 len 0x0001d000 (end 0x0079c000)
extracted SUPD\huduiskin.xex (0x14000 bytes) (crc32: 0x155495d3 ini: 0x155495d3)
adding as huduiskin.xex at raw offset 0x79d000 len 0x00014000 (end 0x007b1000)
extracted SUPD\mfgbootlauncher.xex (0x8000 bytes) (crc32: 0xdecbab8e ini: 0xdecbab8e)
adding as mfgbootlauncher.xex at raw offset 0x7b4000 len 0x00008000 (end 0x007bc000)
extracted SUPD\minimediaplayer.xex (0xc000 bytes) (crc32: 0x2892b8d5 ini: 0x2892b8d5)
adding as minimediaplayer.xex at raw offset 0x7bc000 len 0x0000c000 (end 0x007c8000)
extracted SUPD\nomni.xexp (0xc800 bytes) (crc32: 0xdcef767a ini: 0xdcef767a)
adding as nomni.xexp1 at raw offset 0x7c8000 len 0x0000c800 (end 0x007d4800)
extracted SUPD\nomnifwk.xexp (0x2000 bytes) (crc32: 0x0d14c998 ini: 0x0d14c998)
adding as nomnifwk.xexp1 at raw offset 0x7d4800 len 0x00002000 (end 0x007d6800)
extracted SUPD\nomnifwm.xexp (0x5000 bytes) (crc32: 0xdc46bb6e ini: 0xdc46bb6e)
adding as nomnifwm.xexp1 at raw offset 0x7da000 len 0x00005000 (end 0x007df000)
extracted SUPD\SegoeXbox-Light.xtt (0x6000 bytes) (crc32: 0xe0ee6049 ini: 0xe0ee6049)
adding as SegoeXbox-Light.xtt at raw offset 0x7e1000 len 0x00006000 (end 0x007e7000)
extracted SUPD\signin.xex (0x19000 bytes) (crc32: 0xcbfce61f ini: 0xcbfce61f)
adding as signin.xex at raw offset 0x7ea000 len 0x00019000 (end 0x00803000)
extracted SUPD\updater.xex (0x7000 bytes) (crc32: 0xafef5cf0 ini: 0xafef5cf0)
adding as updater.xex at raw offset 0x805000 len 0x00007000 (end 0x0080c000)
extracted SUPD\vk.xex (0xb000 bytes) (crc32: 0xf2caff49 ini: 0xf2caff49)
adding as vk.xex at raw offset 0x80f000 len 0x0000b000 (end 0x0081a000)
extracted SUPD\xam.xex (0x253000 bytes) (crc32: 0x79f6eabf ini: 0x79f6eabf)
adding as xam.xex at raw offset 0x81b000 len 0x00253000 (end 0x00a6e000)
extracted nanddump\xenonclatin.xtt (0x11b000 bytes) (crc32: 0xd5d17ff5 ini: 0xd5d17ff5)
adding as xenonclatin.xtt at raw offset 0xa6f000 len 0x0011b000 (end 0x00b8a000)
extracted SUPD\xenonclatin.xttp (0x18000 bytes) (crc32: 0x7a507ad1 ini: 0x7a507ad1)
adding as xenonclatin.xttp1 at raw offset 0xb8b000 len 0x00018000 (end 0x00ba3000)
extracted nanddump\xenonjklatin.xtt (0x1a8000 bytes) (crc32: 0xdde4a14c ini: 0xdde4a14c)
adding as xenonjklatin.xtt at raw offset 0xba4000 len 0x001a8000 (end 0x00d4c000)
extracted SUPD\xenonjklatin.xttp (0x7000 bytes) (crc32: 0xe2adddfb ini: 0xe2adddfb)
adding as xenonjklatin.xttp1 at raw offset 0xd4c000 len 0x00007000 (end 0x00d53000)
extracted SUPD\ximecore.xex (0x17000 bytes) (crc32: 0x4c2f6bd1 ini: 0x4c2f6bd1)
adding as ximecore.xex at raw offset 0xd53000 len 0x00017000 (end 0x00d6a000)
extracted nanddump\ximedic.xex (0x90000 bytes) (crc32: 0x1d992bfb ini: 0x1d992bfb)
adding as ximedic.xex at raw offset 0xd6b000 len 0x00090000 (end 0x00dfb000)
extracted SUPD\ximedic.xexp (0x2800 bytes) (crc32: 0x34c9b084 ini: 0x34c9b084)
adding as ximedic.xexp1 at raw offset 0xdfc000 len 0x00002800 (end 0x00dfe800)
reading 16747\..\launch.xex (0xd000 bytes)
adding as launch.xex at raw offset 0xdfe800 len 0x0000d000 (end 0x00e0b800)
reading 16747\..\lhelper.xex (0x6000 bytes)
adding as lhelper.xex at raw offset 0xe0d000 len 0x00006000 (end 0x00e13000)
***** could not read file '..\launch.ini', skipping *****
------ adding 5 security files ------
<- Processing crl.bin ->
reading data\crl.bin (0xa00 bytes)
crl appears crypted, attempting to decrypt with CPU key...failed! Trying alternate key...success!
adding as crl.bin at raw offset 0xe18000 len 0x00000a00 (end 0x00e18a00)
<- Processing dae.bin ->
reading data\dae.bin (0xad30 bytes)
dae appears encrypted, attempting to decrypt with CPU key...failed! Attempting to decrypt with alternate key...
success!
adding as dae.bin at raw offset 0xe1c000 len 0x0000ad30 (end 0x00e26d30)
<- Processing extended.bin ->
reading data\extended.bin (0x4000 bytes)
adding as extended.bin at raw offset 0xe28000 len 0x00004000 (end 0x00e2c000)
<- Processing fcrt.bin ->
fcrt.bin not found and not required by keyvault, skipped
<- Processing secdata.bin ->
reading data\secdata.bin (0x400 bytes)
adding as secdata.bin at raw offset 0xe2c000 len 0x00000400 (end 0x00e2c400)
------ checking for Mobile*.dat ------
MobileB.dat found, adding from previous parse
adding MobileB.dat as type 0x31 at raw offset 0xe30000 len 0x800 (end 0xe30800)
MobileC.dat found, adding from previous parse
adding MobileC.dat as type 0x32 at raw offset 0xe34000 len 0x200 (end 0xe34200)
MobileD.dat found, adding from previous parse
adding MobileD.dat as type 0x33 at raw offset 0xe38000 len 0x800 (end 0xe38800)
MobileE.dat found, adding from previous parse
adding MobileE.dat as type 0x34 at raw offset 0xe3c000 len 0x800 (end 0xe3c800)
Statistics.settings found, adding from previous parse
adding Statistics.settings at raw offset 0xf78000 len 0x1000 (end 0xf79000)
------ adding smc_config.bin ------
adding smc config to offset 0x00f7c000, len 0x400
------ finalizing image ------
Fixing up empty FS block entries...done!
Writing FS table to image offset 0xe40000 len 0x4000 (end 0xe44000)...done!
calculating ECD bytes and assembling raw image...done!
done remapping!
------ writing image to disk ------
writing file 'C:\Users\Dr. Logan\Desktop\J-Runner v02 Beta (284) Core Pack\328551483605\updflash.bin' to disk...done!
---------------------------------------------------------------
C:\Users\Dr. Logan\Desktop\J-Runner v02 Beta (284) Core Pack\328551483605\updflash.bin image built, info:
---------------------------------------------------------------
Kernel : 2.0.16747.0
Console : Falcon
NAND size : 16MiB
Build : Glitch (v2)
Xell : power on console with console eject button
Serial : 328551483605
ConsoleId : 024754747224
MoboSerial: 7578450205078365
Mfg Date : 09/05/2008
CPU Key : 5046EF5C549431D9D8EB6B45B1461FF0
1BL Key : DD88AD0C9ED669E7B56794FB68563EFA
DVD Key : CA620490C6EA82F99BBF51536E801F14
CF LDV : 14
KV type : type2 (hashed - unchecked, master key not available)
---------------------------------------------------------------
xeBuild Finished. Have a nice day.
---------------------------------------------------------------
Rater post output of updflash image booting:
Code:
CR4 Selected
Version: 10
Power Up
Waiting for POST to change
Post 0D - GLITCH CHECK COMMENCE
Post 01 - .
Post 03 - ...
Post 04 - BOOT SEQUENCE STARTING
Post 05 - ...
Post 06 - ....
Post 07 - .....
Post 08 - ......
Post 09 - .......
Post 0A - ........
Post 0B - .........
Post 0C - ..........
Post 0D - GLITCH CHECK COMMENCE
Post 01 - .
Post 03 - ...
Post 04 - BOOT SEQUENCE STARTING
Post 05 - ...
Post 06 - ....
Post 07 - .....
Post 08 - ......
Post 09 - .......
Post 0A - ........
Post 0B - .........
Post 0C - ..........
Post 0D - GLITCH CHECK COMMENCE
Post 01 - .
Post 03 - ...
Post 04 - BOOT SEQUENCE STARTING
Post 05 - ...
Post 06 - ....
Post 07 - .....
Post 08 - ......
Post 09 - .......
Post 0A - ........
Post 0B - .........
Post 0C - ..........
Post 0D - GLITCH CHECK COMMENCE
Post 0E - CB_B ENTRY REACHED
Post 01 - .
Post 03 - ...
Post 04 - BOOT SEQUENCE STARTING
Post 05 - ...
Post 06 - ....
Post 07 - .....
Post 08 - ......
Post 09 - .......
Post 0A - ........
Post 0B - .........
Post 0C - ..........
Post 0D - GLITCH CHECK COMMENCE
Post 0E - CB_B ENTRY REACHED
Post 01 - .
Post 03 - ...
Post 04 - BOOT SEQUENCE STARTING
Post 05 - ...
Post 06 - ....
Post 07 - .....
Post 08 - ......
Post 09 - .......
Post 0A - ........
Post 0B - .........
Post 0C - ..........
Post 0D - GLITCH CHECK COMMENCE
Post 0E - CB_B ENTRY REACHED
Post 0F - GLITCH SUCCESSFUL
Post 10 - ......
Post 11 - .......
Post 12 - ........
Post 13 - .........
Post 15 - CONTINUING
Post 16 - .
Post 17 - ..
Post 18 - ...
Post 19 - ....
Post 1A - .....
Post 1B - ......
Post 1D - ........
Post 1E - .
Post 1F - ..
Post 20 - ...
Post 21 - ....
Post 22 - .
Post 23 - ..
Post 24 - Entrypoint reached
Post 25 - ...
Post 26 - ....
Post 27 - .....
Post 28 - ......
Post 29 - .......
Post 2A - ........
Post 2B - .........
Post 2C - ...........
Post 2D - ............
Shutdown
Power Up
Waiting for POST to change
Post 01 - .
Post 03 - ...
Post 04 - BOOT SEQUENCE STARTING
Post 05 - ...
Post 06 - ....
Post 07 - .....
Post 08 - ......
Post 09 - .......
Post 0A - ........
Post 0B - .........
Post 0C - ..........
Post 0D - GLITCH CHECK COMMENCE
Post 01 - .
Post 03 - ...
Post 04 - BOOT SEQUENCE STARTING
Post 05 - ...
Post 06 - ....
Post 07 - .....
Post 08 - ......
Post 09 - .......
Post 0A - ........
Post 0B - .........
Post 0C - ..........
Post 0D - GLITCH CHECK COMMENCE
Post 0E - CB_B ENTRY REACHED
Post 01 - .
Post 03 - ...
Post 04 - BOOT SEQUENCE STARTING
Post 05 - ...
Post 06 - ....
Post 07 - .....
Post 08 - ......
Post 09 - .......
Post 0A - ........
Post 0B - .........
Post 0C - ..........
Post 0D - GLITCH CHECK COMMENCE
Post 0E - CB_B ENTRY REACHED
Post 01 - .
Post 03 - ...
Post 04 - BOOT SEQUENCE STARTING
Post 05 - ...
Post 06 - ....
Post 07 - .....
Post 08 - ......
Post 09 - .......
Post 0A - ........
Post 0B - .........
Post 0C - ..........
Post 0D - GLITCH CHECK COMMENCE
Post 0E - CB_B ENTRY REACHED
Post 0F - GLITCH SUCCESSFUL
Post 10 - ......
Post 11 - .......
Post 12 - ........
Post 13 - .........
Post 15 - CONTINUING
Post 16 - .
Post 17 - ..
Post 18 - ...
Post 19 - ....
Post 1A - .....
Post 1B - ......
Post 1D - ........
Post 1E - .
Post 1F - ..
Post 20 - ...
Post 21 - ....
Post 22 - .
Post 23 - ..
Post 24 - Entrypoint reached
Post 25 - ...
Post 26 - ....
Post 27 - .....
Post 28 - ......
Post 29 - .......
Post 2A - ........
Post 2B - .........
Post 2C - ...........
Post 2D - ............
Shutdown
Power Up
Waiting for POST to change
Post 01 - .
Post 03 - ...
Post 04 - BOOT SEQUENCE STARTING
Post 05 - ...
Post 06 - ....
Post 07 - .....
Post 08 - ......
Post 09 - .......
Post 0A - ........
Post 0B - .........
Post 0C - ..........
Post 0D - GLITCH CHECK COMMENCE
Post 0E - CB_B ENTRY REACHED
Post 01 - .
Post 03 - ...
Post 04 - BOOT SEQUENCE STARTING
Post 05 - ...
Post 06 - ....
Post 07 - .....
Post 08 - ......
Post 09 - .......
Post 0A - ........
Post 0B - .........
Post 0C - ..........
Post 0D - GLITCH CHECK COMMENCE
Post 0E - CB_B ENTRY REACHED
Post 01 - .
Post 03 - ...
Post 04 - BOOT SEQUENCE STARTING
Post 05 - ...
Post 06 - ....
Post 07 - .....
Post 08 - ......
Post 09 - .......
Post 0A - ........
Post 0B - .........
Post 0C - ..........
Post 0D - GLITCH CHECK COMMENCE
Post 0E - CB_B ENTRY REACHED
Post 0F - GLITCH SUCCESSFUL
Post 10 - ......
Post 11 - .......
Post 12 - ........
Post 13 - .........
Post 15 - CONTINUING
Post 16 - .
Post 17 - ..
Post 18 - ...
Post 19 - ....
Post 1A - .....
Post 1B - ......
Post 1C - .......
Post 1D - ........
Post 1E - .
Post 1F - ..
Post 20 - ...
Post 21 - ....
Post 22 - .
Post 23 - ..
Post 24 - Entrypoint reached
Post 25 - ...
Post 26 - ....
Post 27 - .....
Post 28 - ......
Post 29 - .......
Post 2A - ........
Post 2B - .........
Post 2C - ...........
Post 2D - ............
Shutdown
Power Up
Waiting for POST to change
Shutdown
And xell, (successful xell boot, like always):
Code:
CR4 Selected
Version: 10
Power Up
Waiting for POST to change
Post 01 - .
Post 03 - ...
Post 04 - BOOT SEQUENCE STARTING
Post 05 - ...
Post 06 - ....
Post 07 - .....
Post 08 - ......
Post 09 - .......
Post 0A - ........
Post 0B - .........
Post 0C - ..........
Post 0D - GLITCH CHECK COMMENCE
Post 0E - CB_B ENTRY REACHED
Post 01 - .
Post 03 - ...
Post 04 - BOOT SEQUENCE STARTING
Post 05 - ...
Post 06 - ....
Post 07 - .....
Post 08 - ......
Post 09 - .......
Post 0A - ........
Post 0B - .........
Post 0C - ..........
Post 0D - GLITCH CHECK COMMENCE
Post 0E - CB_B ENTRY REACHED
Post 01 - .
Post 03 - ...
Post 04 - BOOT SEQUENCE STARTING
Post 05 - ...
Post 06 - ....
Post 07 - .....
Post 08 - ......
Post 09 - .......
Post 0A - ........
Post 0B - .........
Post 0C - ..........
Post 0D - GLITCH CHECK COMMENCE
Post 0E - CB_B ENTRY REACHED
Post 01 - .
Post 03 - ...
Post 04 - BOOT SEQUENCE STARTING
Post 05 - ...
Post 06 - ....
Post 07 - .....
Post 08 - ......
Post 09 - .......
Post 0A - ........
Post 0B - .........
Post 0C - ..........
Post 0D - GLITCH CHECK COMMENCE
Post 0E - CB_B ENTRY REACHED
Post 0F - GLITCH SUCCESSFUL
Post 10 - ......
Post 11 - .......
Post 12 - ........
Post 13 - .........
Post 15 - CONTINUING
Post 16 - .
Post 17 - ..
Shutdown
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Last edited: