FIXED Unable to boot xell

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Khyle_atkinsonn

Junior Member
Jan 25, 2014
12
0
image.jpgimage.jpgimage.jpgHi guys and girls i purchased the jr programer v2 cr3 pro ultimate kit a few days ago and have not been able to get the xbox to boot in to the xell to retrive my cpu key .

info :
xbox revision: trinity 10.86amp
install method : full qsb install ( post qsb fully soldered to all pad corectly and nand read/write qsb installed corectly aswell) , cpu rst wire (blue wire is a aproximitly 10 cm ( full length didnt make a difference )
Dash board: gta 5 one 16537 :D
software: j runner 0.3 b4
windows 8 with driver signature enforcment off

ohkay so i am able to read and write to the nand fine with no errors . I have backed up my stock nand about 341354 times well 3 but all different locations so i do not get stuck with an electronic brick haha.

when i build the .ecc files all is good as well as write the . Ecc .
How ever when i attempt to boot the console it does not glitch to xell the red light on thr cr3 stays solid red and ever fee seconds the green light on the cr3 blinks . I get no image on the screen nor am i able to find my xbox using ip or read cpu key in j runner .
its really killing me as i was told and read that cr3 pro was the one thats a first timer would have best luck with .

when the xell fails to boot i restore the stock nand to ensure that the console boots again and it does :D
how ever when the dvd drive is reattached to the power and sata conectors in shows the red light so i just disconect the dvd drive for the time being on problem at a time i guess.

ive attempted to use the dip switches but no luck . Please help me please please .

This will be my first attempt at rgh 2 glich and first attempt to run unsigned code on an xbox :D so i am open to everyones opinion and will accept critisism as i can see it flying my way as i am a noob to all this and all haha . Just so yous all know i have read forum after forum after thread and so on even resorted to youtube and nothing :/
Thanks in advance
 
Last edited:

Khyle_atkinsonn

Junior Member
Jan 25, 2014
12
0
yello wire i conected the pin out because the conector for teh white clip is slightly loose reads and writes the nand fine just incase you wamted to know
 

Khyle_atkinsonn

Junior Member
Jan 25, 2014
12
0
Is that what the yellow one is for ? Cause actually didnt know where that went can you please tell me ? Also i will remove the cap thanks
 

Khyle_atkinsonn

Junior Member
Jan 25, 2014
12
0
I tried the cap removal and set the length of cpu_rst to 32 cm as it seems to the optimal length from posts ive read anyway im still not getting xell would you like a raterscreen shot of both stock nand and .ecc loaded nand? It may help you diagnose my issue
 

BL4K3Y

VIP Member
Top Poster Of Month
Jul 7, 2010
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Have you got a POST/RATER log?

You should try one dip switch at a time and then a combination of switches (for example: 4 and 5).
 
Last edited:
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Khyle_atkinsonn

Junior Member
Jan 25, 2014
12
0
Ohkay ive soldered the blue wire to 22 and yeah have had a go with the dip to find no luck at all and yes sure ill do one stock and .ecc and (rater /cpu post log ) give me 10mins as it takes a bit
 

Khyle_atkinsonn

Junior Member
Jan 25, 2014
12
0
sorry for a direct copy paste but the uploader just wont work it keep fzeezing :/

===================================================
Monday, January 27, 2014 6:31:09 PM


J-Runner v0.3 Beta (4) Started




WARNING! - Your selected working directory already contains files!
You can view these files by using 'Show Working Folder' Button


Initializing nanddump2.bin..
Trinity
RGH2 Selected
Nand Initialization Finished
Version: 10
Flash Config: 0x00023010
Writing Nand
nanddump2.bin
Done!
in 3:37 min:sec


Initializing nanddump2.bin..
Trinity
Nand Initialization Finished
ECC created
Version: 10
Flash Config: 0x00023010
Writing Nand
image_00000000.ecc
Done!
in 0:18 min:sec


Initializing nanddump1.bin..
Trinity
Nand Initialization Finished
Version: 00
Wrong Version.
Version: 10
Flash Config: 0x00023010
Writing Nand
nanddump1.bin
Done!
in 3:36 min:sec


Initializing nanddump1.bin..
Trinity
Nand Initialization Finished
ECC created
Version: 10
Flash Config: 0x00000000
Can not Continue
Version: 10
Flash Config: 0x00023010
Writing Nand
image_00000000.ecc
Done!
in 0:18 min:sec


Initializing nanddump1.bin..
Trinity
Nand Initialization Finished
Version: 10
Flash Config: 0x00023010
Writing Nand
nanddump1.bin
Done!
in 3:36 min:sec


ECC created
Version: 00
Wrong Version.
Trinity Manually Selected
Version: FF
Wrong Version.
Initializing nanddump1.bin..
Trinity
Nand Initialization Finished
Version: 00
Wrong Version.


No internet connection found (RasInstalled), so can't check integrity of files. Use at your own risk
===================================================
Monday, January 27, 2014 8:32:35 PM


J-Runner v0.3 Beta (4) Started




WARNING! - Your selected working directory already contains files!
You can view these files by using 'Show Working Folder' Button


Initializing nanddump1.bin..
Trinity
RGH2 Selected
Nand Initialization Finished
Version: 00
Wrong Version.
Version: 00
Wrong Version.
Version: 00
Wrong Version.
ECC created
Version: 10
Flash Config: 0x00000000
Can not Continue
Version: 10
Flash Config: 0x00023010
Writing Nand
image_00000000.ecc
Done!
in 0:18 min:sec


Initializing nanddump2.bin..
Trinity
Nand Initialization Finished
Version: 10
Flash Config: 0x00023010
Writing Nand
nanddump2.bin
Done!
in 3:37 min:sec




No internet connection found (RasInstalled), so can't check integrity of files. Use at your own risk
===================================================
Monday, January 27, 2014 10:05:27 PM


J-Runner v0.3 Beta (4) Started




WARNING! - Your selected working directory already contains files!
You can view these files by using 'Show Working Folder' Button


Initializing nanddump2.bin..
Trinity
RGH2 Selected
Nand Initialization Finished
ECC created
Version: 10
Flash Config: 0x00023010
Writing Nand
image_00000000.ecc
Done!
in 0:18 min:sec


Initializing nanddump2.bin..
Trinity
Nand Initialization Finished
Version: 10
Flash Config: 0x00023010
Writing Nand
nanddump2.bin
Done!
in 3:36 min:sec


ECC created
Initializing nanddump1.bin..
Trinity
Nand Initialization Finished
ECC created
Version: 10
Flash Config: 0x00023010
Writing Nand
image_00000000.ecc
Done!
in 0:18 min:sec


Initializing nanddump1.bin..
Trinity
Nand Initialization Finished
Version: 10
Flash Config: 0x00023010
Writing Nand
nanddump1.bin
Done!
in 3:36 min:sec


Initializing nanddump1.bin..
Trinity
Nand Initialization Finished
ECC created
Version: 10
Flash Config: 0x00023010
Writing Nand
image_00000000.ecc
Done!
in 0:18 min:sec
 

Attachments

Khyle_atkinsonn

Junior Member
Jan 25, 2014
12
0
Ohkay i tried that as well i am in the process of a complete reinstall of the post and nand x qsb incase the soldering is botch :/
 

Khyle_atkinsonn

Junior Member
Jan 25, 2014
12
0
So i done what everyone has sugested and checked ever solder joint and it just will not glitch should i try the slim proto v2 ?
 

Khyle_atkinsonn

Junior Member
Jan 25, 2014
12
0
I reasemble the consol as im buying the slim proto v2 and going try again i will upload my rater log however and if you see the issue ill open it back up and go again :)

I cannot upload the .txt just freezes so ill copy paste sorry if its against the rules .



Code:
Slim Selected
Version: 10
Power Up
Waiting for POST to change
Post 90 - Panic - VMX_ASSIST 
Post 10 - Payload/1BL started 
Post B1 - Panic - VERIFY_OFFSET 
Post 10 - Payload/1BL started 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post D0 - CB_A entry point reached 
Post D2 - VERIFY_OFFSET_CB_B 
Post D3 - FETCH_HEADER_CB_B 
Post D4 - VERIFY_HEADER_CB_B 
Post D5 - FETCH_CONTENTS_CB_B 
Post D6 - HMACSHA_COMPUTE_CB_B 
Post D7 - RC4_INITIALIZE_CB_B 
Post D8 - RC4_DECRYPT_CB_B 
Post D9 - SHA_COMPUTE_CB_B 
Post DA - SHA_VERIFY_CB_B 
Post F2 - Panic - SHA_VERIFY_CB_B 
Post 10 - Payload/1BL started 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post D0 - CB_A entry point reached 
Post D2 - VERIFY_OFFSET_CB_B 
Post D3 - FETCH_HEADER_CB_B 
Post D4 - VERIFY_HEADER_CB_B 
Post D5 - FETCH_CONTENTS_CB_B 
Post D6 - HMACSHA_COMPUTE_CB_B 
Post D7 - RC4_INITIALIZE_CB_B 
Post D8 - RC4_DECRYPT_CB_B 
Post D9 - SHA_COMPUTE_CB_B 
Post DA - SHA_VERIFY_CB_B 
Post F2 - Panic - SHA_VERIFY_CB_B 
Post E0 
Post 10 - Payload/1BL started 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post D0 - CB_A entry point reached 
Post D1 - READ_FUSES 
Post D3 - FETCH_HEADER_CB_B 
Post D4 - VERIFY_HEADER_CB_B 
Post D5 - FETCH_CONTENTS_CB_B 
Post D6 - HMACSHA_COMPUTE_CB_B 
Post D7 - RC4_INITIALIZE_CB_B 
Post D8 - RC4_DECRYPT_CB_B 
Post D9 - SHA_COMPUTE_CB_B 
Post DA - SHA_VERIFY_CB_B 
Post F2 - Panic - SHA_VERIFY_CB_B 
Post 10 - Payload/1BL started 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post D0 - CB_A entry point reached 
Post D1 - READ_FUSES 
Post D3 - FETCH_HEADER_CB_B 
Post D5 - FETCH_CONTENTS_CB_B 
Post D6 - HMACSHA_COMPUTE_CB_B 
Post D7 - RC4_INITIALIZE_CB_B 
Post D8 - RC4_DECRYPT_CB_B 
Post D9 - SHA_COMPUTE_CB_B 
Post DA - SHA_VERIFY_CB_B 
Post F2 - Panic - SHA_VERIFY_CB_B 
Post 10 - Payload/1BL started 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post D0 - CB_A entry point reached 
Post D2 - VERIFY_OFFSET_CB_B 
Post D3 - FETCH_HEADER_CB_B 
Post D4 - VERIFY_HEADER_CB_B 
Post D5 - FETCH_CONTENTS_CB_B 
Post D6 - HMACSHA_COMPUTE_CB_B 
Post D7 - RC4_INITIALIZE_CB_B 
Post D8 - RC4_DECRYPT_CB_B 
Post D9 - SHA_COMPUTE_CB_B 
Post DA - SHA_VERIFY_CB_B 
Post F2 - Panic - SHA_VERIFY_CB_B 
Post 10 - Payload/1BL started 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post D0 - CB_A entry point reached 
Post D2 - VERIFY_OFFSET_CB_B 
Post D3 - FETCH_HEADER_CB_B 
Post D4 - VERIFY_HEADER_CB_B 
Post D5 - FETCH_CONTENTS_CB_B 
Post D6 - HMACSHA_COMPUTE_CB_B 
Post D7 - RC4_INITIALIZE_CB_B 
Post D8 - RC4_DECRYPT_CB_B 
Post D9 - SHA_COMPUTE_CB_B 
Post DA - SHA_VERIFY_CB_B 
Post F2 - Panic - SHA_VERIFY_CB_B 
Post A2 - Panic - VERIFY_SECOTP_8 
Post 10 - Payload/1BL started 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post D0 - CB_A entry point reached 
Post D2 - VERIFY_OFFSET_CB_B 
Post D3 - FETCH_HEADER_CB_B 
Post D4 - VERIFY_HEADER_CB_B 
Post D5 - FETCH_CONTENTS_CB_B 
Post D6 - HMACSHA_COMPUTE_CB_B 
Post D7 - RC4_INITIALIZE_CB_B 
Post D8 - RC4_DECRYPT_CB_B 
Post D9 - SHA_COMPUTE_CB_B 
Post DA - SHA_VERIFY_CB_B 
Post F2 - Panic - SHA_VERIFY_CB_B 
Post FE 
Post 10 - Payload/1BL started 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post D0 - CB_A entry point reached 
Post D2 - VERIFY_OFFSET_CB_B 
Post D3 - FETCH_HEADER_CB_B 
Post D4 - VERIFY_HEADER_CB_B 
Post D5 - FETCH_CONTENTS_CB_B 
Post D6 - HMACSHA_COMPUTE_CB_B 
Post D7 - RC4_INITIALIZE_CB_B 
Post D8 - RC4_DECRYPT_CB_B 
Post D9 - SHA_COMPUTE_CB_B 
Post DA - SHA_VERIFY_CB_B 
Post F2 - Panic - SHA_VERIFY_CB_B 
Post 10 - Payload/1BL started 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post D0 - CB_A entry point reached 
Post D2 - VERIFY_OFFSET_CB_B 
Post D3 - FETCH_HEADER_CB_B 
Post D4 - VERIFY_HEADER_CB_B 
Post D5 - FETCH_CONTENTS_CB_B 
Post D6 - HMACSHA_COMPUTE_CB_B 
Post D7 - RC4_INITIALIZE_CB_B 
Post D8 - RC4_DECRYPT_CB_B 
Post D9 - SHA_COMPUTE_CB_B 
Post DA - SHA_VERIFY_CB_B 
Post F2 - Panic - SHA_VERIFY_CB_B 
Post 10 - Payload/1BL started 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post D0 - CB_A entry point reached 
Post D2 - VERIFY_OFFSET_CB_B 
Post D3 - FETCH_HEADER_CB_B 
Post D4 - VERIFY_HEADER_CB_B 
Post D5 - FETCH_CONTENTS_CB_B 
Post D6 - HMACSHA_COMPUTE_CB_B 
Post D7 - RC4_INITIALIZE_CB_B 
Post D8 - RC4_DECRYPT_CB_B 
Post D9 - SHA_COMPUTE_CB_B 
Post DA - SHA_VERIFY_CB_B 
Post F2 - Panic - SHA_VERIFY_CB_B 
Post 10 - Payload/1BL started 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post D0 - CB_A entry point reached 
Post D1 - READ_FUSES 
Post D3 - FETCH_HEADER_CB_B 
Post D4 - VERIFY_HEADER_CB_B 
Post D5 - FETCH_CONTENTS_CB_B 
Post D6 - HMACSHA_COMPUTE_CB_B 
Post D7 - RC4_INITIALIZE_CB_B 
Post D8 - RC4_DECRYPT_CB_B 
Post D9 - SHA_COMPUTE_CB_B 
Post DA - SHA_VERIFY_CB_B 
Post F2 - Panic - SHA_VERIFY_CB_B 
Post 10 - Payload/1BL started 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post D0 - CB_A entry point reached 
Post D2 - VERIFY_OFFSET_CB_B 
Post D3 - FETCH_HEADER_CB_B 
Post D4 - VERIFY_HEADER_CB_B 
Post D5 - FETCH_CONTENTS_CB_B 
Post D6 - HMACSHA_COMPUTE_CB_B 
Post D7 - RC4_INITIALIZE_CB_B 
Post D8 - RC4_DECRYPT_CB_B 
Post D9 - SHA_COMPUTE_CB_B 
Post DA - SHA_VERIFY_CB_B 
Post F2 - Panic - SHA_VERIFY_CB_B 
Post 10 - Payload/1BL started 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post D0 - CB_A entry point reached 
Post D1 - READ_FUSES 
Post D3 - FETCH_HEADER_CB_B 
Post D4 - VERIFY_HEADER_CB_B 
Post D5 - FETCH_CONTENTS_CB_B 
Post D6 - HMACSHA_COMPUTE_CB_B 
Post D7 - RC4_INITIALIZE_CB_B 
Post D8 - RC4_DECRYPT_CB_B 
Post D9 - SHA_COMPUTE_CB_B 
Post DA - SHA_VERIFY_CB_B 
Post F2 - Panic - SHA_VERIFY_CB_B 
Post 10 - Payload/1BL started 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post D0 - CB_A entry point reached 
Post D1 - READ_FUSES 
Post D3 - FETCH_HEADER_CB_B 
Post D4 - VERIFY_HEADER_CB_B 
Post D5 - FETCH_CONTENTS_CB_B 
Post D6 - HMACSHA_COMPUTE_CB_B 
Post D7 - RC4_INITIALIZE_CB_B 
Post D8 - RC4_DECRYPT_CB_B 
Post D9 - SHA_COMPUTE_CB_B 
Post DA - SHA_VERIFY_CB_B 
Post F2 - Panic - SHA_VERIFY_CB_B 
Post 20 - CB entry point reached 
Post 10 - Payload/1BL started 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post D0 - CB_A entry point reached 
Post D2 - VERIFY_OFFSET_CB_B 
Post D3 - FETCH_HEADER_CB_B 
Post D4 - VERIFY_HEADER_CB_B 
Post D5 - FETCH_CONTENTS_CB_B 
Post D6 - HMACSHA_COMPUTE_CB_B 
Post D7 - RC4_INITIALIZE_CB_B 
Post D8 - RC4_DECRYPT_CB_B 
Post D9 - SHA_COMPUTE_CB_B 
Post DA - SHA_VERIFY_CB_B 
Post F2 - Panic - SHA_VERIFY_CB_B 
Post E0 
Post 10 - Payload/1BL started 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post D0 - CB_A entry point reached 
Post D2 - VERIFY_OFFSET_CB_B 
Post D3 - FETCH_HEADER_CB_B 
Post D4 - VERIFY_HEADER_CB_B 
Post D5 - FETCH_CONTENTS_CB_B 
Post D6 - HMACSHA_COMPUTE_CB_B 
Post D7 - RC4_INITIALIZE_CB_B 
Post D8 - RC4_DECRYPT_CB_B 
Post D9 - SHA_COMPUTE_CB_B 
Post DA - SHA_VERIFY_CB_B 
Post F2 - Panic - SHA_VERIFY_CB_B 
Post 10 - Payload/1BL started 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post D0 - CB_A entry point reached 
Post D2 - VERIFY_OFFSET_CB_B 
Post D3 - FETCH_HEADER_CB_B 
Post D4 - VERIFY_HEADER_CB_B 
Post D5 - FETCH_CONTENTS_CB_B 
Post D6 - HMACSHA_COMPUTE_CB_B 
Post D7 - RC4_INITIALIZE_CB_B 
Post D8 - RC4_DECRYPT_CB_B 
Post D9 - SHA_COMPUTE_CB_B 
Post DA - SHA_VERIFY_CB_B 
Post F2 - Panic - SHA_VERIFY_CB_B 
Post 10 - Payload/1BL started 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post D0 - CB_A entry point reached 
Post D2 - VERIFY_OFFSET_CB_B 
Post D3 - FETCH_HEADER_CB_B 
Post D4 - VERIFY_HEADER_CB_B 
Post D5 - FETCH_CONTENTS_CB_B 
Post D6 - HMACSHA_COMPUTE_CB_B 
Post D7 - RC4_INITIALIZE_CB_B 
Post D8 - RC4_DECRYPT_CB_B 
Post D9 - SHA_COMPUTE_CB_B 
Post DA - SHA_VERIFY_CB_B 
Post F2 - Panic - SHA_VERIFY_CB_B 
Post 80 
Post 03 
Post 10 - Payload/1BL started 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post D0 - CB_A entry point reached 
Post D1 - READ_FUSES 
Post D3 - FETCH_HEADER_CB_B 
Post D4 - VERIFY_HEADER_CB_B 
Post D5 - FETCH_CONTENTS_CB_B 
Post D6 - HMACSHA_COMPUTE_CB_B 
Post D7 - RC4_INITIALIZE_CB_B 
Post D8 - RC4_DECRYPT_CB_B 
Post D9 - SHA_COMPUTE_CB_B 
Post DA - SHA_VERIFY_CB_B 
Post F2 - Panic - SHA_VERIFY_CB_B 
Post 38 - SIG_VERIFY_4BL_CD 
Post 10 - Payload/1BL started 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post D0 - CB_A entry point reached 
Post D1 - READ_FUSES 
Post D3 - FETCH_HEADER_CB_B 
Post D4 - VERIFY_HEADER_CB_B 
Post D5 - FETCH_CONTENTS_CB_B 
Post D6 - HMACSHA_COMPUTE_CB_B 
Post D7 - RC4_INITIALIZE_CB_B 
Post D8 - RC4_DECRYPT_CB_B 
Post D9 - SHA_COMPUTE_CB_B 
Post DA - SHA_VERIFY_CB_B 
Post F2 - Panic - SHA_VERIFY_CB_B 
Post 10 - Payload/1BL started 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post D0 - CB_A entry point reached 
Post D1 - READ_FUSES 
Post D3 - FETCH_HEADER_CB_B 
Post D4 - VERIFY_HEADER_CB_B 
Post D5 - FETCH_CONTENTS_CB_B 
Post D6 - HMACSHA_COMPUTE_CB_B 
Post D7 - RC4_INITIALIZE_CB_B 
Post D8 - RC4_DECRYPT_CB_B 
Post D9 - SHA_COMPUTE_CB_B 
Post DA - SHA_VERIFY_CB_B 
Post F2 - Panic - SHA_VERIFY_CB_B 
Post E0 
Post 10 - Payload/1BL started 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post D0 - CB_A entry point reached 
Post D1 - READ_FUSES 
Post D3 - FETCH_HEADER_CB_B 
Post D4 - VERIFY_HEADER_CB_B 
Post D5 - FETCH_CONTENTS_CB_B 
Post D6 - HMACSHA_COMPUTE_CB_B 
Post D7 - RC4_INITIALIZE_CB_B 
Post D8 - RC4_DECRYPT_CB_B 
Post D9 - SHA_COMPUTE_CB_B 
Post DA - SHA_VERIFY_CB_B 
Post F2 - Panic - SHA_VERIFY_CB_B 
Most Fails(cumulative): 0xF2
Shutdown
View all ...
3 of 3Open
 

Martin C

VIP Member
Jan 10, 2004
35,981
0
Scotland, UK
www.team-xecuter.com
So every one is F2, indicating either a solder issue or timing too deep.

Try setting 4 5 and 6 DIPs and see if you get anything other than F2. I hope you've removed the Cap.

If it's still F2, remove the X-clamp and post a CLEAR image of the QSB.
 
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Khyle_atkinsonn

Junior Member
Jan 25, 2014
12
0
View attachment My Post output 2.txtimage.jpgimage.jpgimage.jpgOhkay ill do that asap im not home right now and thanks you everyone for your help it means alot when people go out of there way to help someone . Also martin if the timing was too deep would it take more 400 attempts on rater to get a boot cause thats what i get up to before i give in

edit : f2 always does thats so ill snap a shot of the post qsb for asap
 
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Khyle_atkinsonn

Junior Member
Jan 25, 2014
12
0
IMG_0429[1].jpgMy Rater Screenshot.png

hi guys i have resolved my issue i have got 2,1,2,1 boot times now .

what i did i ditched the ribon i must of damaged it somehow. i directly soldered the cpu_rst to the cpu_rst pad instead of the 22 pad (used 35cm of laptop wifi cable double insulated and looped under the board.

for cpu_post i used the number 1 pad on the qsb and same wire as stated above with on 11cm .

i set the dips to 5 on

with no cap

thank you everyone for you help it was all muchly appreciated
 
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