Weird Corona V2 issue...

ramsfan3068 · Jan 29, 2015

No boot, single glitch and stop with slim selected.

Code:

Post 03 Post 04 
Post 05 
Post 06 
Post 07 
Post 08 
Post 09 
Post 0A 
Post 0B 
Post 0C 
Post 0D

Full boot, single glitch and boot with slim selected.

Code:

Post 03 Post 04 
Post 05 
Post 06 
Post 07 
Post 08 
Post 09 
Post 0A 
Post 0B 
Post 0C 
Post 0D 
Post 0E 
Post 0F 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 1F 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 23 - INIT_SYSRAM 
Post 24 - VERIFY_OFFSET_3BL_CC 
Post 25 - LOCATE_3BL_CC 
Post 26 - FETCH_HEADER_3BL_CC 
Post 27 - VERIFY_HEADER_3BL_CC 
Post 28 - FETCH_CONTENTS_3BL_CC 
Post 29 - HMACSHA_COMPUTE_3BL_CC 
Post 2A - RC4_INITIALIZE_3BL_CC 
Post 2B - RC4_DECRYPT_3BL_CC 
Post 2C - SHA_COMPUTE_3BL_CC 
Post 2D - SIG_VERIFY_3BL_CC 
Post 2E - HWINIT 
Post 2F - RELOCATE 
Post 30 - VERIFY_OFFSET_4BL_CD

Double glitch, no boot with CR4 selected

Code:

Post 30 - .............. Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 03 - ... 
Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE

Single glitch, full boot with CR4 selected

Code:

Post 03 - ... Post 04 - BOOT SEQUENCE STARTING 
Post 05 - ... 
Post 06 - .... 
Post 07 - ..... 
Post 08 - ...... 
Post 09 - ....... 
Post 0A - ........ 
Post 0B - ......... 
Post 0C - .......... 
Post 0D - GLITCH CHECK COMMENCE 
Post 0E - CB_B ENTRY REACHED 
Post 0F - GLITCH SUCCESSFUL 
Post 11 - ....... 
Post 12 - ........ 
Post 13 - ......... 
Post 15 - CONTINUING 
Post 16 - . 
Post 17 - .. 
Post 18 - ... 
Post 19 - .... 
Post 1A - ..... 
Post 1B - ...... 
Post 1D - ........ 
Post 1E - . 
Post 1F - .. 
Post 20 - ... 
Post 21 - .... 
Post 22 - . 
Post 23 - .. 
Post 24 - Entrypoint reached 
Post 25 - ... 
Post 26 - .... 
Post 27 - ..... 
Post 28 - ...... 
Post 29 - ....... 
Post 2A - ........ 
Post 2B - ......... 
Post 2C - ........... 
Post 2D - ............ 
Post 2E - LOAD XAM 
Post 2F - ............. 
Post 30 - ..............

stucknvegas · Jan 29, 2015

I used CR-3 on V-2 in the past> Not the fastest starting but they always work
Do you have a old CR-3 lite laying around

ramsfan3068 · Jan 30, 2015

stucknvegas said:
I used CR-3 on V-2 in the past> Not the fastest starting but they always work
Do you have a old CR-3 lite laying around

I have a rev C, but the point is to make this work. @oggy, any suggestions??

nofeloniesyet · Jan 30, 2015

ramsfan3068 said:
I have a rev C, but the point is to make this work. @oggy, any suggestions??

tried using the cr4 smc in autogg to build a glitch2m img? worth a shot

stucknvegas · Jan 30, 2015

My point would be that it would eliminate anything to do with your Image being at fault
Or if the problem continues with the CR-3 lite then maybe your console is at fault
Or maybe someone that is more experienced than me> would chime in on this one and offer there help
I have done all models of Corona with CR-4 I know that probably doesn't help you now

ramsfan3068 · Jan 30, 2015

nofeloniesyet said:
tried using the cr4 smc in autogg to build a glitch2m img? worth a shot

I tried but I don't think the smc stuck when creating the nand because it refused to boot. How are you supposed to get the smc file to stick?

Oggy · Jan 30, 2015

Right, knock RATER on the head and use tools--> post monitoring. rater is a pain to troubleshoot problems with due to shutdown/cooldown periods.

do 25 pulses (succesful or not) .... not 25 attempts, paste the log here.

ramsfan3068 · Jan 30, 2015

Oggy said:
Right, knock RATER on the head and use tools--> post monitoring. rater is a pain to troubleshoot problems with due to shutdown/cooldown periods.

do 25 pulses (succesful or not) .... not 25 attempts, paste the log here.

All right. Will do. Thank you for jumping in. It won't be tonight, as today is my birthday and this is what we do. But I do appreciate you jumping in with help.

[video=youtube;fW_kbsHOC-Q]https://www.youtube.com/watch?v=fW_kbsHOC-Q[/video]

Oggy · Jan 30, 2015

I've a stoating headache, I wouldn't be reading post logs tonight!

ramsfan3068 · Feb 3, 2015

Oggy said:
I've a stoating headache, I wouldn't be reading post logs tonight!

Code:

Version: 10
Press Escape to exit
Waiting for POST to change
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 0E
Post 0F
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 0E
Post 0F
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 0E
Post 0F
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post 22 - INIT_SECENG
Post 23 - INIT_SYSRAM
Post 24 - VERIFY_OFFSET_3BL_CC
Post 25 - LOCATE_3BL_CC
Post 26 - FETCH_HEADER_3BL_CC
Post 27 - VERIFY_HEADER_3BL_CC
Post 28 - FETCH_CONTENTS_3BL_CC
Post 29 - HMACSHA_COMPUTE_3BL_CC
Post 2A - RC4_INITIALIZE_3BL_CC
Post 2B - RC4_DECRYPT_3BL_CC
Post 2C - SHA_COMPUTE_3BL_CC
Post 2D - SIG_VERIFY_3BL_CC
Post 2E - HWINIT
Post 2F - RELOCATE
Post 30 - VERIFY_OFFSET_4BL_CD
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 0E
Post 0F
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post 22 - INIT_SECENG
Post 23 - INIT_SYSRAM
Post 24 - VERIFY_OFFSET_3BL_CC
Post 25 - LOCATE_3BL_CC
Post 26 - FETCH_HEADER_3BL_CC
Post 27 - VERIFY_HEADER_3BL_CC
Post 28 - FETCH_CONTENTS_3BL_CC
Post 29 - HMACSHA_COMPUTE_3BL_CC
Post 2A - RC4_INITIALIZE_3BL_CC
Post 2B - RC4_DECRYPT_3BL_CC
Post 2C - SHA_COMPUTE_3BL_CC
Post 2D - SIG_VERIFY_3BL_CC
Post 2E - HWINIT
Post 2F - RELOCATE
Post 30 - VERIFY_OFFSET_4BL_CD
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 0E
Post 0F
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post 22 - INIT_SECENG
Post 23 - INIT_SYSRAM
Post 24 - VERIFY_OFFSET_3BL_CC
Post 25 - LOCATE_3BL_CC
Post 26 - FETCH_HEADER_3BL_CC
Post 27 - VERIFY_HEADER_3BL_CC
Post 28 - FETCH_CONTENTS_3BL_CC
Post 29 - HMACSHA_COMPUTE_3BL_CC
Post 2A - RC4_INITIALIZE_3BL_CC
Post 2B - RC4_DECRYPT_3BL_CC
Post 2C - SHA_COMPUTE_3BL_CC
Post 2D - SIG_VERIFY_3BL_CC
Post 2E - HWINIT
Post 2F - RELOCATE
Post 30 - VERIFY_OFFSET_4BL_CD
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 0E
Post 0F
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 0E
Post 0F
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post 22 - INIT_SECENG
Post 23 - INIT_SYSRAM
Post 24 - VERIFY_OFFSET_3BL_CC
Post 25 - LOCATE_3BL_CC
Post 26 - FETCH_HEADER_3BL_CC
Post 27 - VERIFY_HEADER_3BL_CC
Post 28 - FETCH_CONTENTS_3BL_CC
Post 29 - HMACSHA_COMPUTE_3BL_CC
Post 2A - RC4_INITIALIZE_3BL_CC
Post 2B - RC4_DECRYPT_3BL_CC
Post 2C - SHA_COMPUTE_3BL_CC
Post 2D - SIG_VERIFY_3BL_CC
Post 2E - HWINIT
Post 2F - RELOCATE
Post 30 - VERIFY_OFFSET_4BL_CD
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 0E
Post 0F
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post 22 - INIT_SECENG
Post 23 - INIT_SYSRAM
Post 24 - VERIFY_OFFSET_3BL_CC
Post 25 - LOCATE_3BL_CC
Post 26 - FETCH_HEADER_3BL_CC
Post 27 - VERIFY_HEADER_3BL_CC
Post 28 - FETCH_CONTENTS_3BL_CC
Post 29 - HMACSHA_COMPUTE_3BL_CC
Post 2A - RC4_INITIALIZE_3BL_CC
Post 2B - RC4_DECRYPT_3BL_CC
Post 2C - SHA_COMPUTE_3BL_CC
Post 2D - SIG_VERIFY_3BL_CC
Post 2E - HWINIT
Post 2F - RELOCATE
Post 30 - VERIFY_OFFSET_4BL_CD
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 0E
Post 0F
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 03
Post 04
Post 05
Post 06
Post 07
Post 08
Post 09
Post 0A
Post 0B
Post 0C
Post 0D
Post 0E
Post 0F
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 1F
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post 22 - INIT_SECENG
Post 23 - INIT_SYSRAM
Post 24 - VERIFY_OFFSET_3BL_CC
Post 26 - FETCH_HEADER_3BL_CC
Post 27 - VERIFY_HEADER_3BL_CC
Post 28 - FETCH_CONTENTS_3BL_CC
Post 29 - HMACSHA_COMPUTE_3BL_CC
Post 2A - RC4_INITIALIZE_3BL_CC
Post 2B - RC4_DECRYPT_3BL_CC
Post 2C - SHA_COMPUTE_3BL_CC
Post 2D - SIG_VERIFY_3BL_CC
Post 2E - HWINIT
Post 2F - RELOCATE
Post 30 - VERIFY_OFFSET_4BL_CD

ramsfan3068 · Feb 3, 2015

Oggy said:
I've a stoating headache, I wouldn't be reading post logs tonight!

Have you had a chance to look at the post logs? Its weird because it freezes on Post 0F as well as Post 0D where I have to power down, and restart it. It doesn't continue to glitch when it fails.

ramsfan3068 · Feb 5, 2015

Don't everyone jump at once to help. Rev C boots, but not at all like the CR4? Tips, suggestions, anyone???

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Weird Corona V2 issue...

ramsfan3068

Senior Member

stucknvegas

ramsfan3068

Senior Member

nofeloniesyet

stucknvegas

ramsfan3068

Senior Member

Oggy

ramsfan3068

Senior Member

Oggy

ramsfan3068

Senior Member

ramsfan3068

Senior Member

ramsfan3068

Senior Member