Zephyr not boot

mohamedwaly

Junior Member
Jan 27, 2007
17
0
Egypt
Falcon not boot

Console Type: Falcon
NAND size: 16
Dashboard version: before r-jtag 15574 after 16537
CB version: 5774
Screenshot of NAND details from J-Runner:
J-Runner log:
POST output from J-Runner (either POST_OUT monitor or RATER output):

updflash.bin log (if applicable):
Image of R-JTAG board:
Images of close-up soldering to motherboard:
IMG_6375.JPGIMG_6376.JPGIMG_6378.JPGIMG_6381.JPGIMG_6385.JPGIMG_6386.JPGIMG_6388.JPGIMG_6389.JPG

Description of problem:
i install R-jtag to my Falcon
xbox but the j-r programmer see it as falcon and after that i flash the nand, then i test to boot the xbox but about 2% of tries only the xbox boot successfully and about 49% of tries the r-jtag LED2(Green) flashing for 15 seconds and then it stopped and xbox not boot and 49% of tries the r-jtag led2 (green ) not flashing and only red led is on and the xbox not boot too.


Was the console working before you started: Y
 
Last edited:

mohamedwaly

Junior Member
Jan 27, 2007
17
0
Egypt
Thats on the correct side. Change your dips 7&8 should be off & off sice it looks like you have fw1.1
i try this with no luck , i try to read and write and a new NAND but also no luck : here is the log and screen shot
Untitled.png

===================================================Tuesday, November 19, 2013 1:00:19 AM


J-Runner v0.3 Beta (2) Started






Checking Files
Downloaded *xeBuild/readme.txt
Version: 10
Flash Config: 0x01198010
01198010
Xenon, Zephyr, Opus, Falcon
CB Version: 5770
Falcon/Opus
Downloaded *xeBuild/xeBuild.exe
Finished Checking Files
Reading Nand to C:\Users\Mohamed\Desktop\New folder\software\J-Runner\output\nanddump1.bin
Reading Nand
Jtag Selected
Aud_Clamp Selected
R-Jtag Selected
Done!
in 3:24 min:sec


Initializing nanddump1.bin..
CpuKey is Correct
Added Key to Database
Extracting..
Saving SMC_en.bin
Saving SMC_dec.bin
Saving KV_en.bin
Saving KV_dec.bin
Saving smc_config.bin
Finished
Falcon/Opus
Nand Initialization Finished
Moving All files from output folder to C:\Users\Mohamed\Desktop\New folder\software\J-Runner\215687681505
R-Jtag de-Selected
Aud_Clamp de-Selected
Jtag Selected
Aud_Clamp Selected
R-Jtag Selected
Load Files Initiliazation Finished
Hacked SMC detected
16537
Started Creation of the 16537 xebuild image
KV Info saved to file
---------------------------------------------------------------
xeBuild v1.07.632
---------------------------------------------------------------
base path changed to C:\Users\Mohamed\Desktop\New folder\software\J-Runner\xeBuild
---- { Image Build Mode } ----
building jtag image




******* WARNING: could not patch SMC reset limit!


---------------------------------------------------------------
C:\Users\Mohamed\Desktop\New folder\software\J-Runner\215687681505\updflash.bin image built, info:
---------------------------------------------------------------
Kernel : 2.0.16537.0
Console : Falcon
NAND size : 16MiB
Build : JTAG
Xell : power on console with console eject button
Serial : 215687681505
ConsoleId : 011273783192
MoboSerial: 7394530218848155
Mfg Date : 04/09/2008
CPU Key : 7AC4269F3D479675F6800E0D3D041CEA
1BL Key : DD88AD0C9ED669E7B56794FB68563EFA
DVD Key : 12F2D6B8C656012ECD8CD9669522C94C
CF LDV : 8
KV type : type2 (hashed - unchecked, master key not available)
---------------------------------------------------------------
xeBuild Finished. Have a nice day.
---------------------------------------------------------------
Saved to C:\Users\Mohamed\Desktop\New folder\software\J-Runner\215687681505
Image is Ready
Version: 10
Flash Config: 0x01198010
Writing Nand
updflash.bin
Done!
in 3:44 min:sec
 

mohamedwaly

Junior Member
Jan 27, 2007
17
0
Egypt
hello
i try the dip switch with different voltage but without change the cpu_rst and this is the post
Phat SelectedVersion: 10
Power Up
Waiting for POST to change
Post 5E - INIT_SOC_INT_COMPLETE
Post 60 - INIT_KERNEL
Post 61 - INIT_HAL_PHASE_0
Post E0
Post 40 - Entrypoint of CD reached
Post 4C - SWEEP_CACHES
Post 44 - FETCH_CONTENTS
Post C3 - LZX_EXPAND_3
Post 40 - Entrypoint of CD reached
Post 50 - LOAD_UPDATE_1
Post 51 - LOAD_UPDATE_2
Post 52 - BRANCH
Post 53 - DECRYT_VERIFY_HV_CERT
Post 54
Post 55
Post 56
Post 57
Post 58 - INIT_HYPERVISOR
Post 59 - INIT_SOC_MMIO
Post 5A - INIT_XEX_TRAINING
Post 5B - INIT_KEYRING
Post 5C - INIT_KEYS
Post 5D - INIT_SOC_INT
Post 5E - INIT_SOC_INT_COMPLETE
Post 60 - INIT_KERNEL
Post 61 - INIT_HAL_PHASE_0
Post E0
Post 40 - Entrypoint of CD reached
Post 50 - LOAD_UPDATE_1
Post 51 - LOAD_UPDATE_2
Post 52 - BRANCH
Post 53 - DECRYT_VERIFY_HV_CERT
Post 54
Post 55
Post 56
Post 57
Post 58 - INIT_HYPERVISOR
Post 59 - INIT_SOC_MMIO
Post 5A - INIT_XEX_TRAINING
Post 5B - INIT_KEYRING
Post 5C - INIT_KEYS
Post 5D - INIT_SOC_INT
Post 5E - INIT_SOC_INT_COMPLETE
Post 60 - INIT_KERNEL
Post 61 - INIT_HAL_PHASE_0
Post E0
Post 40 - Entrypoint of CD reached
Post 4C - SWEEP_CACHES
Post 40 - Entrypoint of CD reached
Post 50 - LOAD_UPDATE_1
Post 51 - LOAD_UPDATE_2
Post 52 - BRANCH
Post 53 - DECRYT_VERIFY_HV_CERT
Post 54
Post 55
Post 56
Post 57
Post 58 - INIT_HYPERVISOR
Post 59 - INIT_SOC_MMIO
Post 5A - INIT_XEX_TRAINING
Post 5B - INIT_KEYRING
Post 5C - INIT_KEYS
Post 5D - INIT_SOC_INT
Post 5E - INIT_SOC_INT_COMPLETE
Post 60 - INIT_KERNEL
Post 61 - INIT_HAL_PHASE_0
Post E0
Post 40 - Entrypoint of CD reached
Post 50 - LOAD_UPDATE_1
Post 51 - LOAD_UPDATE_2
Post 52 - BRANCH
Post 53 - DECRYT_VERIFY_HV_CERT
Post 54
Post 55
Post 56
Post 57
Post 58 - INIT_HYPERVISOR
Post 59 - INIT_SOC_MMIO
Post 5A - INIT_XEX_TRAINING
Post 5B - INIT_KEYRING
Post 5C - INIT_KEYS
Post 5D - INIT_SOC_INT
Post 5E - INIT_SOC_INT_COMPLETE
Post 60 - INIT_KERNEL
Post 61 - INIT_HAL_PHASE_0
Post E0
Shutdown
 

mohamedwaly

Junior Member
Jan 27, 2007
17
0
Egypt
hello
i check all wires and remove some of them and re-solded them again and i install my orginal nand them xell them xebuild, here is the full post code

Code:
Patching Jasper version 2.3 SMC at offset 0x12BAXeLL file created Successfully falcon_hack_aud_clamp.bin
Version: 10
Flash Config: 0x01198010
Writing Nand
falcon_hack_aud_clamp.bin
Done!
in 0:18 min:sec


Load Files Initiliazation Finished
Clean SMC detected
Patching Jasper version 2.3 SMC at offset 0x12BA
16537
Started Creation of the 16537 xebuild image
KV Info saved to file
---------------------------------------------------------------
     xeBuild v1.07.632
---------------------------------------------------------------
base path changed to C:\Users\ahmedwaly\Desktop\hhhhh\hhhhh\xeBuild
---- { Image Build Mode } ----
building jtag image




******* WARNING: could not patch SMC reset limit!


---------------------------------------------------------------
C:\Users\ahmedwaly\Desktop\hhhhh\hhhhh\215687681505\updflash.bin image built, info:
---------------------------------------------------------------
Kernel    : 2.0.16537.0
Console   : Falcon
NAND size : 16MiB
Build     : JTAG
Xell      : power on console with console eject button
Serial    : 215687681505
ConsoleId : 011273783192
MoboSerial: 7394530218848155
Mfg Date  : 04/09/2008
CPU Key   : 7AC4269F3D479675F6800E0D3D041CEA
1BL Key   : DD88AD0C9ED669E7B56794FB68563EFA
DVD Key   : 12F2D6B8C656012ECD8CD9669522C94C
CF LDV    : 8
KV type   : type2 (hashed - unchecked, master key not available)
---------------------------------------------------------------
    xeBuild Finished. Have a nice day.
---------------------------------------------------------------
Saved to C:\Users\ahmedwaly\Desktop\hhhhh\hhhhh\215687681505
Image is Ready
Version: 10
Flash Config: 0x01198010
Writing Nand
updflash.bin
Done!
in 3:38 min:sec


Phat Selected
Version: 10
Power Up
Waiting for POST to change
Post 06 
Post 46 - RC4_INITIALIZE 
Post 44 - FETCH_CONTENTS 
Post 40 - Entrypoint of CD reached 
Post 44 - FETCH_CONTENTS 
Post 40 - Entrypoint of CD reached 
Post 3F 
Post 40 - Entrypoint of CD reached 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 70 - INIT_VIDEO_DRIVER 
Post 40 - Entrypoint of CD reached 
Post 70 - INIT_VIDEO_DRIVER 
Post 60 - INIT_KERNEL 
Post 70 - INIT_VIDEO_DRIVER 
Post 60 - INIT_KERNEL 
Post 70 - INIT_VIDEO_DRIVER 
Post 60 - INIT_KERNEL 
Post 70 - INIT_VIDEO_DRIVER 
Post 60 - INIT_KERNEL 
Post 70 - INIT_VIDEO_DRIVER 
Post 60 - INIT_KERNEL 
Post 70 - INIT_VIDEO_DRIVER 
Post 60 - INIT_KERNEL 
Post 70 - INIT_VIDEO_DRIVER 
Post 40 - Entrypoint of CD reached 
Post 70 - INIT_VIDEO_DRIVER 
Post 60 - INIT_KERNEL 
Post 70 - INIT_VIDEO_DRIVER 
Post 60 - INIT_KERNEL 
Post 70 - INIT_VIDEO_DRIVER 
Post 60 - INIT_KERNEL 
Post 70 - INIT_VIDEO_DRIVER 
Post 60 - INIT_KERNEL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 20 - CB entry point reached 
Post 40 - Entrypoint of CD reached 
Post 40 - Entrypoint of CD reached 
Post 40 - Entrypoint of CD reached 
Post 70 - INIT_VIDEO_DRIVER 
Post 40 - Entrypoint of CD reached 
Post 70 - INIT_VIDEO_DRIVER 
Post 50 - LOAD_UPDATE_1 
Post 70 - INIT_VIDEO_DRIVER 
Post 40 - Entrypoint of CD reached 
Post 70 - INIT_VIDEO_DRIVER 
Post 40 - Entrypoint of CD reached 
Post 70 - INIT_VIDEO_DRIVER 
Post 40 - Entrypoint of CD reached 
Post 70 - INIT_VIDEO_DRIVER 
Post 40 - Entrypoint of CD reached 
Post 70 - INIT_VIDEO_DRIVER 
Post 40 - Entrypoint of CD reached 
Post 70 - INIT_VIDEO_DRIVER 
Post 40 - Entrypoint of CD reached 
Post 70 - INIT_VIDEO_DRIVER 
Post 12 - FSB_CONFIG_RX_STATE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 23 - INIT_SYSRAM 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 49 - SHA_VERIFY 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 51 - LOAD_UPDATE_2 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 69 - INIT_KEY_VAULT 
Post 6C - INIT_SECURITY 
Post 70 - INIT_VIDEO_DRIVER 
Post 79 - LOAD_XAM 
Most Fails(cumulative): 0xA0
Shutdown
Power Up
Waiting for POST to change
Post 1C - SHA_COMPUTE 
Post 7C 
Post 1C - SHA_COMPUTE 
Post 7C 
Post 1C - SHA_COMPUTE 
Post 7C 
Post 1C - SHA_COMPUTE 
Post 7C 
Post 1C - SHA_COMPUTE 
Post 7C 
Post 1C - SHA_COMPUTE 
Post 7C 
Post 1C - SHA_COMPUTE 
Post 7C 
Post 1C - SHA_COMPUTE 
Post 7C 
Post 1C - SHA_COMPUTE 
Post 7C 
Post 1C - SHA_COMPUTE 
Post 7C 
Post 1C - SHA_COMPUTE 
Post 7C 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 10 - Payload/1BL started 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 70 - INIT_VIDEO_DRIVER 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 70 - INIT_VIDEO_DRIVER 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 70 - INIT_VIDEO_DRIVER 
Post 70 - INIT_VIDEO_DRIVER 
Post 70 - INIT_VIDEO_DRIVER 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post 70 - INIT_VIDEO_DRIVER 
Post 70 - INIT_VIDEO_DRIVER 
Post 70 - INIT_VIDEO_DRIVER 
Post 70 - INIT_VIDEO_DRIVER 
Post 70 - INIT_VIDEO_DRIVER 
Post 12 - FSB_CONFIG_RX_STATE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post 0C 
Post 10 - Payload/1BL started 
Post 30 - VERIFY_OFFSET_4BL_CD 
Most Fails(cumulative): 0xA0
Shutdown
every time it retry and stop in the following codes
Code:
Post 20 - CB entry point reached
 Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6
 
Last edited:

gavin_darkglide

VIP Member
Dec 14, 2012
2,303
118
Re: Falcon not boot

Just looking at your original pictures it looks like the post point #7 is burnt.

Sent from my Z796C using Tapatalk
 

mohamedwaly

Junior Member
Jan 27, 2007
17
0
Egypt
Finally:
after change the r-jtag itself with anther new one and resold all point again and download 3 dashboard and flash my nand over 30 times i got the solution:
1-the working dashboard 15574
2-IMPORTANT:i must insert HDMI cable while i testing (no Dependent on leds only), the falcon not boot without HDMI or Av cable plugin.(Not written in guide).:D
Thank you