Zephyr wont boot into Xell, not sure what to do

N

nikokon

Noob Account
Mar 4, 2014
3
0
Console Type: Zephyr
NAND size: Not sure
Dashboard version: 15647
CB version: 4569
Screenshot of NAND details from J-Runner:
Capture.PNG

J-Runner log:
Initializing nanddump1.bin..
Zephyr
Jtag Selected
Nand Initialization Finished
Comparing...
Nands are the same

Images of soldering and RJTAG board:
IMG_1465.jpgIMG_1466.jpgIMG_1467.jpgIMG_1468.jpgIMG_1469.jpgIMG_1470.jpgIMG_1471.jpg

Description of problem:
My zephyr just refuses to boot into xell. Read the nand 4 times, all matched then successfully created and wrote ECC. When i try to turn it on, the light in the front of the xbox remains solid green. The green light is blinking on the rjtag. I'm new so please excuse any stupid questions. Also I'm using the cpu_rst on the back of the board.

Was the console working before you started: Yes

Post output:
Code: 
Phat Selected
Version: 10
Power Up
Waiting for POST to change
Post C1 - LZX_EXPAND_1 
Post C1 - LZX_EXPAND_1 
Post 8B - Panic - HYPERVISOR_DECREMENTER 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1E - BRANCH 
Post 1F 
Post 1E - BRANCH 
Post 22 - INIT_SECENG 
Post 23 - INIT_SYSRAM 
Post A2 - Panic - VERIFY_SECOTP_8 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1E - BRANCH 
Post 1F 
Post 1E - BRANCH 
Post 22 - INIT_SECENG 
Post 23 - INIT_SYSRAM 
Post A2 - Panic - VERIFY_SECOTP_8 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1E - BRANCH 
Post 1F 
Post 1E - BRANCH 
Post 22 - INIT_SECENG 
Post 23 - INIT_SYSRAM 
Post A2 - Panic - VERIFY_SECOTP_8 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1E - BRANCH 
Post 1F 
Post 1E - BRANCH 
Post 22 - INIT_SECENG 
Post 23 - INIT_SYSRAM 
Post A2 - Panic - VERIFY_SECOTP_8 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1E - BRANCH 
Post 1F 
Post 1E - BRANCH 
Post 22 - INIT_SECENG 
Post 23 - INIT_SYSRAM 
Post A2 - Panic - VERIFY_SECOTP_8 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1E - BRANCH 
Post 1F 
Post 1E - BRANCH 
Post 22 - INIT_SECENG 
Post 23 - INIT_SYSRAM 
Post A2 - Panic - VERIFY_SECOTP_8 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1E - BRANCH 
Post 1F 
Post 1E - BRANCH 
Post 22 - INIT_SECENG 
Post 23 - INIT_SYSRAM 
Post A2 - Panic - VERIFY_SECOTP_8 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1E - BRANCH 
Post 1F 
Post 1E - BRANCH 
Post 22 - INIT_SECENG 
Post 23 - INIT_SYSRAM 
Post A2 - Panic - VERIFY_SECOTP_8 
Post 0E 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1E - BRANCH 
Post 1F 
Post 1E - BRANCH 
Post 22 - INIT_SECENG 
Post 23 - INIT_SYSRAM 
Post A2 - Panic - VERIFY_SECOTP_8 
Post C2 - LZX_EXPAND_2 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1E - BRANCH 
Post 1F 
Post 1E - BRANCH 
Post 22 - INIT_SECENG 
Post 23 - INIT_SYSRAM 
Post A2 - Panic - VERIFY_SECOTP_8 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1E - BRANCH 
Post 1F 
Post 1E - BRANCH 
Post 22 - INIT_SECENG 
Post 23 - INIT_SYSRAM 
Post A2 - Panic - VERIFY_SECOTP_8 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1E - BRANCH 
Post 1F 
Post 1E - BRANCH 
Post 22 - INIT_SECENG 
Post 23 - INIT_SYSRAM 
Post A2 - Panic - VERIFY_SECOTP_8 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 17 - VERIFY_HEADER 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1E - BRANCH 
Post 1F 
Post 1E - BRANCH 
Post 22 - INIT_SECENG 
Post 23 - INIT_SYSRAM 
Post A2 - Panic - VERIFY_SECOTP_8 
Post 22 - INIT_SECENG 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1E - BRANCH 
Post 1F 
Post 1E - BRANCH 
Post 22 - INIT_SECENG 
Post 23 - INIT_SYSRAM 
Post A2 - Panic - VERIFY_SECOTP_8 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1E - BRANCH 
Post 1F 
Post 1E - BRANCH 
Post 22 - INIT_SECENG 
Post 23 - INIT_SYSRAM 
Post A2 - Panic - VERIFY_SECOTP_8 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1E - BRANCH 
Post 1F 
Post 1E - BRANCH 
Post 22 - INIT_SECENG 
Post 23 - INIT_SYSRAM 
Post A2 - Panic - VERIFY_SECOTP_8 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1E - BRANCH 
Post 1F 
Post 1E - BRANCH 
Post 22 - INIT_SECENG 
Post 23 - INIT_SYSRAM 
Post A2 - Panic - VERIFY_SECOTP_8 
Post C2 - LZX_EXPAND_2 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1E - BRANCH 
Post 1F 
Post 1E - BRANCH 
Post 22 - INIT_SECENG 
Post 23 - INIT_SYSRAM 
Post A2 - Panic - VERIFY_SECOTP_8 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1E - BRANCH 
Post 1F 
Post 1E - BRANCH 
Post 22 - INIT_SECENG 
Post 23 - INIT_SYSRAM 
Post A2 - Panic - VERIFY_SECOTP_8 
Most Fails(cumulative): 0x22
Shutdown
Phat Selected
Version: 10
Power Up
Waiting for POST to change
Post FE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post BE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1E - BRANCH 
Post 1F 
Post 1E - BRANCH 
Post 22 - INIT_SECENG 
Post 23 - INIT_SYSRAM 
Post A2 - Panic - VERIFY_SECOTP_8 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1E - BRANCH 
Post 1F 
Post 1E - BRANCH 
Post 22 - INIT_SECENG 
Post 23 - INIT_SYSRAM 
Post A2 - Panic - VERIFY_SECOTP_8 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1E - BRANCH 
Post 1F 
Post 1E - BRANCH 
Post 22 - INIT_SECENG 
Post 23 - INIT_SYSRAM 
Post A2 - Panic - VERIFY_SECOTP_8 
Post FE 
Post C2 - LZX_EXPAND_2 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1E - BRANCH 
Post 1F 
Post 1E - BRANCH 
Post 22 - INIT_SECENG 
Post 23 - INIT_SYSRAM 
Post A2 - Panic - VERIFY_SECOTP_8 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1E - BRANCH 
Post 1F 
Post 1E - BRANCH 
Post 22 - INIT_SECENG 
Post 23 - INIT_SYSRAM 
Post A2 - Panic - VERIFY_SECOTP_8 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1E - BRANCH 
Post 1F 
Shutdown
Phat Selected
Version: 10
Power Up
Waiting for POST to change
Post 83 - Panic - DATA_SEGMENT 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1E - BRANCH 
Post 1F 
Post 1E - BRANCH 
Post 22 - INIT_SECENG 
Post 23 - INIT_SYSRAM 
Post A2 - Panic - VERIFY_SECOTP_8 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1E - BRANCH 
Post 1F 
Post 1E - BRANCH 
Post 22 - INIT_SECENG 
Post 23 - INIT_SYSRAM 
Post A2 - Panic - VERIFY_SECOTP_8 
Post 06 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1E - BRANCH 
Post 1F 
Post 1E - BRANCH 
Post 22 - INIT_SECENG 
Post 23 - INIT_SYSRAM 
Post A2 - Panic - VERIFY_SECOTP_8 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1E - BRANCH 
Post 1F 
Post 1E - BRANCH 
Post 22 - INIT_SECENG 
Post 23 - INIT_SYSRAM 
Post A2 - Panic - VERIFY_SECOTP_8 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1E - BRANCH 
Post 1F 
Post 1E - BRANCH 
Post 22 - INIT_SECENG 
Post 23 - INIT_SYSRAM 
Post A2 - Panic - VERIFY_SECOTP_8 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1E - BRANCH 
Post 1F 
Post 1E - BRANCH 
Post 22 - INIT_SECENG 
Post 23 - INIT_SYSRAM 
Post A2 - Panic - VERIFY_SECOTP_8 
Post 07 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1E - BRANCH 
Post 1F 
Shutdown
 
Last edited:
Martin C

Martin C

VIP Member
Jan 10, 2004
35,981
0
Scotland, UK
www.team-xecuter.com
gazcoigne

gazcoigne

BANNED
Jan 31, 2005
1,106
0
Belfast, UK
Re: Falcon wont boot into Xell, not sure what to do

have you tried all dip settings and voltages? there are 18 combos to try.

doesnt just work out of the box, R-JTAG takes a bit of tweaking to get right, especially with Zephyr's.
 
BL4K3Y

BL4K3Y

VIP Member
Jul 7, 2010
13,721
118
Colne, Lancashire (UK)
Re: Falcon wont boot into Xell, not sure what to do

Where did you get Falcon from?

The CB version says your board is a Zephyr.

You need to re-solder the points on the POST QSB before doing anything else because your POST output looks wrong.
 
Last edited:
Martin C

Martin C

VIP Member
Jan 10, 2004
35,981
0
Scotland, UK
www.team-xecuter.com
Re: Falcon wont boot into Xell, not sure what to do

Your POST looks wrong.

Write back your original NAND and desolder the CPU_RST wire from your R-JTAG. Then boot the console and monitor POST. Reply with the output.
 
Slayertex6

Slayertex6

VIP Member
Jan 30, 2011
1,199
0
Galveston, Texas
Blakey caught it as well. You posted about a Zephyr then talk about a Falcon. You then mentioned you succesfully created a Xell ecc. Should use the pre-made ecc.
 
Slayertex6

Slayertex6

VIP Member
Jan 30, 2011
1,199
0
Galveston, Texas
BL4K3Y said:
That doesn't apply with R-JTAG images.

The XeLL image (XeLL Reloaded binary) needs patching.

He can't proceed any further until he has done as Martin has advised (a retail console will give a full (good) POST output if that POST QSB is installed correctly).
Click to expand...
Thanks for the clarification. It's 4 in the morning and I'm half asleep.
 
N

nikokon

Noob Account
Mar 4, 2014
3
0
Re: Falcon wont boot into Xell, not sure what to do

OK, I flashed the original NAND, and disconnected the cpu-rst wire. Looking at the POST seems like there is a soldering problem. Here is my POST:
Phat SelectedVersion: 10
Power Up
Waiting for POST to change
Post FC
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 10 - Payload/1BL started
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1C - SHA_COMPUTE
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1C - SHA_COMPUTE
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1C - SHA_COMPUTE
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1C - SHA_COMPUTE
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 01
Post C0
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1C - SHA_COMPUTE
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Most Fails(cumulative): 0xA0
Shutdown
Click to expand...
 
Last edited:
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